Searched refs:ADC1_CDR_RDATA_MST_Pos (Results 1 – 3 of 3) sorted by relevance
1817 #define ADC1_CDR_RDATA_MST_Pos (0U) macro1818 #define ADC1_CDR_RDATA_MST_Msk (0xFFFFUL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x0000FFFF */1820 #define ADC1_CDR_RDATA_MST_0 (0x0001UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000001 */1821 #define ADC1_CDR_RDATA_MST_1 (0x0002UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000002 */1822 #define ADC1_CDR_RDATA_MST_2 (0x0004UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000004 */1823 #define ADC1_CDR_RDATA_MST_3 (0x0008UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000008 */1824 #define ADC1_CDR_RDATA_MST_4 (0x0010UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000010 */1825 #define ADC1_CDR_RDATA_MST_5 (0x0020UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000020 */1826 #define ADC1_CDR_RDATA_MST_6 (0x0040UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000040 */1827 #define ADC1_CDR_RDATA_MST_7 (0x0080UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000080 */[all …]
1818 #define ADC1_CDR_RDATA_MST_Pos (0U) macro1819 #define ADC1_CDR_RDATA_MST_Msk (0xFFFFUL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x0000FFFF */1821 #define ADC1_CDR_RDATA_MST_0 (0x0001UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000001 */1822 #define ADC1_CDR_RDATA_MST_1 (0x0002UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000002 */1823 #define ADC1_CDR_RDATA_MST_2 (0x0004UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000004 */1824 #define ADC1_CDR_RDATA_MST_3 (0x0008UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000008 */1825 #define ADC1_CDR_RDATA_MST_4 (0x0010UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000010 */1826 #define ADC1_CDR_RDATA_MST_5 (0x0020UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000020 */1827 #define ADC1_CDR_RDATA_MST_6 (0x0040UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000040 */1828 #define ADC1_CDR_RDATA_MST_7 (0x0080UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000080 */[all …]
1926 #define ADC1_CDR_RDATA_MST_Pos (0U) macro1927 #define ADC1_CDR_RDATA_MST_Msk (0xFFFFUL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x0000FFFF */1929 #define ADC1_CDR_RDATA_MST_0 (0x0001UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000001 */1930 #define ADC1_CDR_RDATA_MST_1 (0x0002UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000002 */1931 #define ADC1_CDR_RDATA_MST_2 (0x0004UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000004 */1932 #define ADC1_CDR_RDATA_MST_3 (0x0008UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000008 */1933 #define ADC1_CDR_RDATA_MST_4 (0x0010UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000010 */1934 #define ADC1_CDR_RDATA_MST_5 (0x0020UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000020 */1935 #define ADC1_CDR_RDATA_MST_6 (0x0040UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000040 */1936 #define ADC1_CDR_RDATA_MST_7 (0x0080UL << ADC1_CDR_RDATA_MST_Pos) /*!< 0x00000080 */[all …]