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Searched refs:RCC_CFGR_PPRE2_DIV4 (Results 1 – 25 of 154) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_rcc.h243 #define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /*!< HCLK divided by 4 */
/hal_stm32-3.7.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_rcc.h243 #define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /*!< HCLK divided by 4 */
/hal_stm32-3.7.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_rcc.h227 #define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /*!< HCLK divided by 4 */
/hal_stm32-3.7.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_rcc.h288 #define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /*!< HCLK divided by 4 */
/hal_stm32-3.7.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_rcc.h257 #define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /*!< HCLK divided by 4 */
/hal_stm32-3.7.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_rcc.h266 #define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /*!< HCLK divided by 4 */
/hal_stm32-3.7.0/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_rcc.h251 #define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /*!< HCLK divided by 4 */
/hal_stm32-3.7.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_rcc.h325 #define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /*!< HCLK divided by 4 */
/hal_stm32-3.7.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_rcc.h253 #define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /*!< HCLK divided by 4 */
/hal_stm32-3.7.0/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h876 #define RCC_CFGR_PPRE2_DIV4 0x00002800U /*!< HCLK divided by… macro
Dstm32f101xb.h891 #define RCC_CFGR_PPRE2_DIV4 0x00002800U /*!< HCLK divided by… macro
Dstm32f102x6.h916 #define RCC_CFGR_PPRE2_DIV4 0x00002800U /*!< HCLK divided by… macro
Dstm32f100xb.h951 #define RCC_CFGR_PPRE2_DIV4 0x00002800U /*!< HCLK divided by… macro
Dstm32f101xe.h1220 #define RCC_CFGR_PPRE2_DIV4 0x00002800U /*!< HCLK divided by… macro
Dstm32f101xg.h1245 #define RCC_CFGR_PPRE2_DIV4 0x00002800U /*!< HCLK divided by… macro
/hal_stm32-3.7.0/stm32cube/stm32l0xx/soc/
Dstm32l010x8.h3142 #define RCC_CFGR_PPRE2_DIV4 (0x00002800U) /*!< HCLK divided by… macro
Dstm32l021xx.h3367 #define RCC_CFGR_PPRE2_DIV4 (0x00002800U) /*!< HCLK divided by… macro
Dstm32l031xx.h3311 #define RCC_CFGR_PPRE2_DIV4 (0x00002800U) /*!< HCLK divided by… macro
Dstm32l041xx.h3439 #define RCC_CFGR_PPRE2_DIV4 (0x00002800U) /*!< HCLK divided by… macro
Dstm32l051xx.h3383 #define RCC_CFGR_PPRE2_DIV4 (0x00002800U) /*!< HCLK divided by… macro
Dstm32l010x4.h3130 #define RCC_CFGR_PPRE2_DIV4 (0x00002800U) /*!< HCLK divided by… macro
Dstm32l010x6.h3143 #define RCC_CFGR_PPRE2_DIV4 (0x00002800U) /*!< HCLK divided by… macro
Dstm32l010xb.h3150 #define RCC_CFGR_PPRE2_DIV4 (0x00002800U) /*!< HCLK divided by… macro
Dstm32l011xx.h3239 #define RCC_CFGR_PPRE2_DIV4 (0x00002800U) /*!< HCLK divided by… macro
Dstm32l081xx.h3563 #define RCC_CFGR_PPRE2_DIV4 (0x00002800U) /*!< HCLK divided by… macro

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