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Searched refs:RCC_CCIPR_CLK48SEL_Msk (Results 1 – 25 of 43) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32l4xx/soc/
Dstm32l412xx.h6169 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
6170 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32l422xx.h6394 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
6395 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32l431xx.h10095 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
10096 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32l432xx.h9699 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
9700 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32l433xx.h10205 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
10206 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32l451xx.h10372 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
10373 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32l442xx.h9924 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
9925 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32l452xx.h10450 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
10451 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32l471xx.h11385 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
11386 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
/hal_stm32-3.7.0/stm32cube/stm32wbxx/soc/
Dstm32wb30xx.h6950 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
6951 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32wb50xx.h6951 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
6952 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32wb1mxx.h6641 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
6642 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32wb35xx.h7907 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
7908 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32wb55xx.h8134 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
8135 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32wb5mxx.h8134 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
8135 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
/hal_stm32-3.7.0/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h6475 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
6476 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32wb15xx.h6641 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
6642 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
/hal_stm32-3.7.0/stm32cube/stm32g4xx/soc/
Dstm32gbk1cb.h8059 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
8060 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32g431xx.h8087 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
8088 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32g441xx.h8317 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
8318 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32g4a1xx.h8719 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
8720 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32g491xx.h8489 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
8490 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32g471xx.h8656 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
8657 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32g473xx.h9206 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
9207 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk
Dstm32g483xx.h9436 #define RCC_CCIPR_CLK48SEL_Msk (0x3UL << RCC_CCIPR_CLK48SEL_Pos) /*!< 0x0C000000 */ macro
9437 #define RCC_CCIPR_CLK48SEL RCC_CCIPR_CLK48SEL_Msk

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