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Searched refs:RCC_APB2ENR_TIM8EN (Results 1 – 25 of 129) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc_ex.h1526 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
1528 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
1590 #define __HAL_RCC_TIM8_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM8EN))
1631 #define __HAL_RCC_TIM8_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) != RESET)
1644 #define __HAL_RCC_TIM8_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) == RESET)
2535 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
2537 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
2579 #define __HAL_RCC_TIM8_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM8EN))
2596 #define __HAL_RCC_TIM8_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) != RESET)
2603 #define __HAL_RCC_TIM8_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) == RESET)
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Dstm32f4xx_ll_bus.h276 #define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN
/hal_stm32-3.7.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_hal_rcc_ex.h1246 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
1248 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
1260 #define __HAL_RCC_TIM8_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM8EN))
1356 #define __HAL_RCC_TIM8_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) != RESET)
1357 #define __HAL_RCC_TIM8_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) == RESET)
Dstm32f1xx_ll_bus.h213 #define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN
/hal_stm32-3.7.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_rcc.h917 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
919 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
1001 #define __HAL_RCC_TIM8_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM8EN))
1025 #define __HAL_RCC_TIM8_IS_CLK_ENABLED() ((RCC->APB2ENR &(RCC_APB2ENR_TIM8EN))!= RESET)
1039 #define __HAL_RCC_TIM8_IS_CLK_DISABLED() ((RCC->APB2ENR &(RCC_APB2ENR_TIM8EN))== RESET)
Dstm32f2xx_ll_bus.h162 #define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN
/hal_stm32-3.7.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_rcc_ex.h2316 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
2318 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
2322 #define __HAL_RCC_TIM8_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM8EN))
2638 #define __HAL_RCC_TIM8_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) != RESET)
2640 #define __HAL_RCC_TIM8_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) == RESET)
Dstm32f3xx_ll_bus.h196 #define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN
/hal_stm32-3.7.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h1125 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1127 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1207 #define __HAL_RCC_TIM8_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN)
1540 #define __HAL_RCC_TIM8_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) != 0U)
1571 #define __HAL_RCC_TIM8_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) == 0U)
Dstm32g4xx_ll_bus.h191 #define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN
/hal_stm32-3.7.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h1268 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1270 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1338 #define __HAL_RCC_TIM8_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN)
1628 #define __HAL_RCC_TIM8_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) != 0U)
1651 #define __HAL_RCC_TIM8_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) == 0U)
Dstm32l5xx_ll_bus.h175 #define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN
/hal_stm32-3.7.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h1497 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1499 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1601 #define __HAL_RCC_TIM8_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN)
2110 #define __HAL_RCC_TIM8_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) != 0U)
2155 #define __HAL_RCC_TIM8_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) == 0U)
Dstm32l4xx_ll_bus.h255 #define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN
/hal_stm32-3.7.0/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h2184 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
2186 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
2321 #define __HAL_RCC_TIM8_CLK_DISABLE() (RCC->APB2ENR) &= ~ (RCC_APB2ENR_TIM8EN)
2355 #define __HAL_RCC_TIM8_IS_CLK_ENABLED() ((RCC->APB2ENR & RCC_APB2ENR_TIM8EN) != 0U)
2383 #define __HAL_RCC_TIM8_IS_CLK_DISABLED() ((RCC->APB2ENR & RCC_APB2ENR_TIM8EN) == 0U)
3384 SET_BIT(RCC_C1->APB2ENR, RCC_APB2ENR_TIM8EN);\
3386 tmpreg = READ_BIT(RCC_C1->APB2ENR, RCC_APB2ENR_TIM8EN);\
3495 #define __HAL_RCC_C1_TIM8_CLK_DISABLE() (RCC_C1->APB2ENR) &= ~ (RCC_APB2ENR_TIM8EN)
4414 SET_BIT(RCC_C2->APB2ENR, RCC_APB2ENR_TIM8EN);\
4416 tmpreg = READ_BIT(RCC_C2->APB2ENR, RCC_APB2ENR_TIM8EN);\
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Dstm32h7xx_ll_bus.h320 #define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN
/hal_stm32-3.7.0/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h1216 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
1218 tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN);\
1405 #define __HAL_RCC_TIM8_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM8EN))
1664 #define __HAL_RCC_TIM8_IS_CLK_ENABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) != RESET)
1705 #define __HAL_RCC_TIM8_IS_CLK_DISABLED() ((RCC->APB2ENR & (RCC_APB2ENR_TIM8EN)) == RESET)
Dstm32f7xx_ll_bus.h200 #define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN
/hal_stm32-3.7.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h1724 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1726 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1825 #define __HAL_RCC_TIM8_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN)
2467 #define __HAL_RCC_TIM8_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) != 0U)
2503 #define __HAL_RCC_TIM8_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) == 0U)
Dstm32u5xx_ll_bus.h266 #define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN
/hal_stm32-3.7.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h1669 SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1671 … tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN); \
1767 #define __HAL_RCC_TIM8_CLK_DISABLE() CLEAR_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN)
2559 #define __HAL_RCC_TIM8_IS_CLK_ENABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) != 0U)
2600 #define __HAL_RCC_TIM8_IS_CLK_DISABLED() (READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM8EN) == 0U)
Dstm32h5xx_ll_bus.h307 #define LL_APB2_GRP1_PERIPH_TIM8 RCC_APB2ENR_TIM8EN
/hal_stm32-3.7.0/stm32cube/stm32f1xx/soc/
Dstm32f103xg.h1772 #define RCC_APB2ENR_TIM8EN RCC_APB2ENR_TIM8EN_Msk /*!< TIM8 Timer cloc… macro
Dstm32f103xe.h1735 #define RCC_APB2ENR_TIM8EN RCC_APB2ENR_TIM8EN_Msk /*!< TIM8 Timer cloc… macro
/hal_stm32-3.7.0/stm32cube/stm32g4xx/soc/
Dstm32gbk1cb.h7807 #define RCC_APB2ENR_TIM8EN RCC_APB2ENR_TIM8EN_Msk macro

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