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Searched refs:PWR_SR1_WUF5 (Results 1 – 25 of 51) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_pwr.h78 #define LL_PWR_SR1_WUF5 PWR_SR1_WUF5
1292 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF5) == (PWR_SR1_WUF5)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU5()
Dstm32g0xx_hal_pwr.h147 #define PWR_FLAG_WUF5 (0x00010000u | PWR_SR1_WUF5) /*!< Wakeup event on …
/hal_stm32-3.7.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_pwr.h74 #define LL_PWR_SR1_WUF5 PWR_SR1_WUF5
1305 temp = READ_BIT(PWR->SR1, PWR_SR1_WUF5); in LL_PWR_IsActiveFlag_WU5()
1307 return ((temp == (PWR_SR1_WUF5))?1U:0U); in LL_PWR_IsActiveFlag_WU5()
/hal_stm32-3.7.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_pwr.h75 #define LL_PWR_SR1_WUF5 PWR_SR1_WUF5
1377 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF5) == (PWR_SR1_WUF5)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU5()
/hal_stm32-3.7.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_pwr.h77 #define LL_PWR_SR1_WUF5 PWR_SR1_WUF5
1435 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF5) == (PWR_SR1_WUF5)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU5()
/hal_stm32-3.7.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_pwr.h116 #define LL_PWR_SR1_WUF5 PWR_SR1_WUF5
1948 return ((READ_BIT(PWR->SR1, PWR_SR1_WUF5) == (PWR_SR1_WUF5)) ? 1UL : 0UL); in LL_PWR_IsActiveFlag_WU5()
/hal_stm32-3.7.0/stm32cube/stm32g0xx/soc/
Dstm32g070xx.h3668 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Flag 5 */ macro
Dstm32g071xx.h4367 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Flag 5 */ macro
Dstm32g081xx.h4603 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Flag 5 */ macro
Dstm32g0b0xx.h4446 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Flag 5 */ macro
Dstm32g0b1xx.h5414 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Flag 5 */ macro
Dstm32g0c1xx.h5650 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Flag 5 */ macro
/hal_stm32-3.7.0/stm32cube/stm32l4xx/soc/
Dstm32l412xx.h4909 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wake-up Flag 5 … macro
Dstm32l422xx.h5125 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wake-up Flag 5 … macro
Dstm32l431xx.h8592 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wake-up Flag 5 … macro
Dstm32l432xx.h8601 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wake-up Flag 5 … macro
/hal_stm32-3.7.0/stm32cube/stm32g4xx/soc/
Dstm32gbk1cb.h6542 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wake-up Flag 5 … macro
Dstm32g431xx.h6556 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wake-up Flag 5 … macro
Dstm32g441xx.h6777 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wake-up Flag 5 … macro
Dstm32g4a1xx.h6941 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wake-up Flag 5 … macro
Dstm32g491xx.h6720 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wake-up Flag 5 … macro
Dstm32g471xx.h6791 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wake-up Flag 5 … macro
Dstm32g473xx.h7305 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wake-up Flag 5 … macro
/hal_stm32-3.7.0/stm32cube/stm32wbxx/soc/
Dstm32wb55xx.h6415 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Pin 5 [F… macro
Dstm32wb5mxx.h6415 #define PWR_SR1_WUF5 PWR_SR1_WUF5_Msk /*!< Wakeup Pin 5 [F… macro

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