Home
last modified time | relevance | path

Searched refs:VREFBUF_CSR_VRS_Pos (Results 1 – 25 of 109) sorted by relevance

12345

/hal_stm32-3.6.0/stm32cube/stm32g4xx/soc/
Dstm32g431xx.h11493 #define VREFBUF_CSR_VRS_Pos (4U) macro
11494 #define VREFBUF_CSR_VRS_Msk (0x3UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000030 */
11496 #define VREFBUF_CSR_VRS_0 (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000010 */
11497 #define VREFBUF_CSR_VRS_1 (0x2UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000020 */
Dstm32g441xx.h11723 #define VREFBUF_CSR_VRS_Pos (4U) macro
11724 #define VREFBUF_CSR_VRS_Msk (0x3UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000030 */
11726 #define VREFBUF_CSR_VRS_0 (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000010 */
11727 #define VREFBUF_CSR_VRS_1 (0x2UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000020 */
Dstm32g4a1xx.h12233 #define VREFBUF_CSR_VRS_Pos (4U) macro
12234 #define VREFBUF_CSR_VRS_Msk (0x3UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000030 */
12236 #define VREFBUF_CSR_VRS_0 (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000010 */
12237 #define VREFBUF_CSR_VRS_1 (0x2UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000020 */
Dstm32g491xx.h12003 #define VREFBUF_CSR_VRS_Pos (4U) macro
12004 #define VREFBUF_CSR_VRS_Msk (0x3UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000030 */
12006 #define VREFBUF_CSR_VRS_0 (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000010 */
12007 #define VREFBUF_CSR_VRS_1 (0x2UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000020 */
Dstm32g473xx.h12794 #define VREFBUF_CSR_VRS_Pos (4U) macro
12795 #define VREFBUF_CSR_VRS_Msk (0x3UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000030 */
12797 #define VREFBUF_CSR_VRS_0 (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000010 */
12798 #define VREFBUF_CSR_VRS_1 (0x2UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000020 */
Dstm32g471xx.h12226 #define VREFBUF_CSR_VRS_Pos (4U) macro
12227 #define VREFBUF_CSR_VRS_Msk (0x3UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000030 */
12229 #define VREFBUF_CSR_VRS_0 (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000010 */
12230 #define VREFBUF_CSR_VRS_1 (0x2UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000020 */
Dstm32g483xx.h13024 #define VREFBUF_CSR_VRS_Pos (4U) macro
13025 #define VREFBUF_CSR_VRS_Msk (0x3UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000030 */
13027 #define VREFBUF_CSR_VRS_0 (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000010 */
13028 #define VREFBUF_CSR_VRS_1 (0x2UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000020 */
Dstm32g484xx.h16603 #define VREFBUF_CSR_VRS_Pos (4U) macro
16604 #define VREFBUF_CSR_VRS_Msk (0x3UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000030 */
16606 #define VREFBUF_CSR_VRS_0 (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000010 */
16607 #define VREFBUF_CSR_VRS_1 (0x2UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000020 */
Dstm32g474xx.h16373 #define VREFBUF_CSR_VRS_Pos (4U) macro
16374 #define VREFBUF_CSR_VRS_Msk (0x3UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000030 */
16376 #define VREFBUF_CSR_VRS_0 (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000010 */
16377 #define VREFBUF_CSR_VRS_1 (0x2UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000020 */
/hal_stm32-3.6.0/stm32cube/stm32g0xx/soc/
Dstm32g051xx.h7944 #define VREFBUF_CSR_VRS_Pos (2U) macro
7945 #define VREFBUF_CSR_VRS_Msk (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000004 */
Dstm32g031xx.h7463 #define VREFBUF_CSR_VRS_Pos (2U) macro
7464 #define VREFBUF_CSR_VRS_Msk (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000004 */
Dstm32g041xx.h7767 #define VREFBUF_CSR_VRS_Pos (2U) macro
7768 #define VREFBUF_CSR_VRS_Msk (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000004 */
Dstm32g061xx.h8248 #define VREFBUF_CSR_VRS_Pos (2U) macro
8249 #define VREFBUF_CSR_VRS_Msk (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000004 */
Dstm32g071xx.h8328 #define VREFBUF_CSR_VRS_Pos (2U) macro
8329 #define VREFBUF_CSR_VRS_Msk (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000004 */
Dstm32g081xx.h8632 #define VREFBUF_CSR_VRS_Pos (2U) macro
8633 #define VREFBUF_CSR_VRS_Msk (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000004 */
/hal_stm32-3.6.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h20315 #define VREFBUF_CSR_VRS_Pos (4U) macro
20316 #define VREFBUF_CSR_VRS_Msk (0x7UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000004…
20318 #define VREFBUF_CSR_VRS_0 (0x01UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x000O0010…
20319 #define VREFBUF_CSR_VRS_1 (0x02UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000020…
20320 #define VREFBUF_CSR_VRS_2 (0x04UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000030…
Dstm32u545xx.h20911 #define VREFBUF_CSR_VRS_Pos (4U) macro
20912 #define VREFBUF_CSR_VRS_Msk (0x7UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000004…
20914 #define VREFBUF_CSR_VRS_0 (0x01UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x000O0010…
20915 #define VREFBUF_CSR_VRS_1 (0x02UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000020…
20916 #define VREFBUF_CSR_VRS_2 (0x04UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000030…
Dstm32u575xx.h23310 #define VREFBUF_CSR_VRS_Pos (4U) macro
23311 #define VREFBUF_CSR_VRS_Msk (0x7UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000004…
23313 #define VREFBUF_CSR_VRS_0 (0x01UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x000O0010…
23314 #define VREFBUF_CSR_VRS_1 (0x02UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000020…
23315 #define VREFBUF_CSR_VRS_2 (0x04UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000030…
Dstm32u5f7xx.h26298 #define VREFBUF_CSR_VRS_Pos (4U) macro
26299 #define VREFBUF_CSR_VRS_Msk (0x7UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000004…
26301 #define VREFBUF_CSR_VRS_0 (0x01UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x000O0010…
26302 #define VREFBUF_CSR_VRS_1 (0x02UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000020…
26303 #define VREFBUF_CSR_VRS_2 (0x04UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000030…
Dstm32u595xx.h24617 #define VREFBUF_CSR_VRS_Pos (4U) macro
24618 #define VREFBUF_CSR_VRS_Msk (0x7UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000004…
24620 #define VREFBUF_CSR_VRS_0 (0x01UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x000O0010…
24621 #define VREFBUF_CSR_VRS_1 (0x02UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000020…
24622 #define VREFBUF_CSR_VRS_2 (0x04UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000030…
/hal_stm32-3.6.0/stm32cube/stm32h5xx/soc/
Dstm32h562xx.h20272 #define VREFBUF_CSR_VRS_Pos (4U) macro
20273 #define VREFBUF_CSR_VRS_Msk (0x7UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000070…
20275 #define VREFBUF_CSR_VRS_0 (0x01UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x000O0010…
20276 #define VREFBUF_CSR_VRS_1 (0x02UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000020…
20277 #define VREFBUF_CSR_VRS_2 (0x04UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000040…
Dstm32h563xx.h22404 #define VREFBUF_CSR_VRS_Pos (4U) macro
22405 #define VREFBUF_CSR_VRS_Msk (0x7UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000070…
22407 #define VREFBUF_CSR_VRS_0 (0x01UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x000O0010…
22408 #define VREFBUF_CSR_VRS_1 (0x02UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000020…
22409 #define VREFBUF_CSR_VRS_2 (0x04UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000040…
Dstm32h573xx.h23029 #define VREFBUF_CSR_VRS_Pos (4U) macro
23030 #define VREFBUF_CSR_VRS_Msk (0x7UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000070…
23032 #define VREFBUF_CSR_VRS_0 (0x01UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x000O0010…
23033 #define VREFBUF_CSR_VRS_1 (0x02UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000020…
23034 #define VREFBUF_CSR_VRS_2 (0x04UL<< VREFBUF_CSR_VRS_Pos) /*!< 0x00000040…
/hal_stm32-3.6.0/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h8512 #define VREFBUF_CSR_VRS_Pos (2U) macro
8513 #define VREFBUF_CSR_VRS_Msk (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000004 */
Dstm32wle5xx.h8512 #define VREFBUF_CSR_VRS_Pos (2U) macro
8513 #define VREFBUF_CSR_VRS_Msk (0x1UL << VREFBUF_CSR_VRS_Pos) /*!< 0x00000004 */

12345