Home
last modified time | relevance | path

Searched refs:TSC_IOASCR_G7_IO4_Pos (Results 1 – 25 of 73) sorted by relevance

123

/hal_stm32-3.6.0/stm32cube/stm32f0xx/soc/
Dstm32f051x8.h5685 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
5686 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32f058xx.h5654 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
5655 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32f071xb.h6238 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
6239 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32f042x6.h9460 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
9461 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32f048xx.h9424 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
9425 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32f072xb.h10035 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
10036 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32f078xx.h10005 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
10006 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32f098xx.h10659 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
10660 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32f091xc.h10692 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
10693 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
/hal_stm32-3.6.0/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h6211 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
6212 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32l053xx.h6370 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
6371 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32l062xx.h6348 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
6349 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32l063xx.h6505 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
6506 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32l072xx.h6507 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
6508 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32l073xx.h6666 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
6667 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32l082xx.h6644 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
6645 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32l083xx.h6803 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
6804 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
/hal_stm32-3.6.0/stm32cube/stm32f3xx/soc/
Dstm32f318xx.h7459 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
7460 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32f301x8.h7472 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
7473 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32f373xc.h10646 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
10647 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32f378xx.h10544 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
10545 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32f302xc.h11385 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
11386 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
/hal_stm32-3.6.0/stm32cube/stm32wbxx/soc/Include/
Dstm32wb15xx.h8125 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
8126 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
Dstm32wb10xx.h7953 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
7954 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */
/hal_stm32-3.6.0/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8125 #define TSC_IOASCR_G7_IO4_Pos (27U) macro
8126 #define TSC_IOASCR_G7_IO4_Msk (0x1UL << TSC_IOASCR_G7_IO4_Pos) /*!< 0x08000000 */

123