/hal_stm32-3.6.0/stm32cube/stm32f0xx/soc/ |
D | stm32f051x8.h | 5667 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 5668 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32f058xx.h | 5636 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 5637 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32f071xb.h | 6220 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 6221 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32f042x6.h | 9442 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 9443 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32f048xx.h | 9406 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 9407 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32f072xb.h | 10017 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 10018 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32f078xx.h | 9987 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 9988 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32f098xx.h | 10641 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 10642 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32f091xc.h | 10674 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 10675 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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/hal_stm32-3.6.0/stm32cube/stm32l0xx/soc/ |
D | stm32l052xx.h | 6193 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 6194 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32l053xx.h | 6352 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 6353 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32l062xx.h | 6330 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 6331 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32l063xx.h | 6487 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 6488 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32l072xx.h | 6489 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 6490 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32l073xx.h | 6648 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 6649 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32l082xx.h | 6626 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 6627 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32l083xx.h | 6785 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 6786 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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/hal_stm32-3.6.0/stm32cube/stm32f3xx/soc/ |
D | stm32f318xx.h | 7441 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 7442 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32f301x8.h | 7454 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 7455 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32f373xc.h | 10628 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 10629 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32f378xx.h | 10526 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 10527 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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/hal_stm32-3.6.0/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 9334 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 9335 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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/hal_stm32-3.6.0/stm32cube/stm32wbxx/soc/Include/ |
D | stm32wb15xx.h | 8107 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 8108 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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D | stm32wb10xx.h | 7935 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 7936 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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/hal_stm32-3.6.0/stm32cube/stm32wbxx/soc/ |
D | stm32wb1mxx.h | 8107 #define TSC_IOASCR_G6_IO2_Pos (21U) macro 8108 #define TSC_IOASCR_G6_IO2_Msk (0x1UL << TSC_IOASCR_G6_IO2_Pos) /*!< 0x00200000 */
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