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Searched refs:TIM3_AF1_ETRSEL_1 (Results 1 – 25 of 60) sorted by relevance

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/hal_stm32-3.6.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_tim_ex.h114 #define TIM_TIM3_ETR_COMP2 TIM3_AF1_ETRSEL_1 /* !< TIM3_ETR is c…
117 #define TIM_TIM3_ETR_COMP3 (TIM3_AF1_ETRSEL_1 | TIM3_AF1_ETRSEL_0) /* !< TIM3_ETR is c…
/hal_stm32-3.6.0/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_tim_ex.h115 #define TIM_TIM3_ETR_ETH_PPS (TIM3_AF1_ETRSEL_2 | TIM3_AF1_ETRSEL_1) /* !< …
/hal_stm32-3.6.0/stm32cube/stm32g0xx/soc/
Dstm32g070xx.h6677 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g050xx.h6538 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g030xx.h6477 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g051xx.h7153 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g031xx.h6754 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g041xx.h7058 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g061xx.h7457 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g071xx.h7537 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g0b0xx.h7854 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g081xx.h7841 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g0b1xx.h9087 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32g0c1xx.h9391 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
/hal_stm32-3.6.0/stm32cube/stm32h7xx/soc/
Dstm32h7b3xxq.h18855 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h7b0xxq.h18848 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h7b0xx.h18836 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h7a3xx.h18356 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h7b3xx.h18843 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h7a3xxq.h18368 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h730xx.h20514 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h723xx.h20027 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h742xx.h19446 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h733xx.h20514 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro
Dstm32h730xxq.h20526 #define TIM3_AF1_ETRSEL_1 (0x2UL << TIM3_AF1_ETRSEL_Pos) /*!< 0x00008000 */ macro

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