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Searched refs:RCC_PLL3DIVR_PLL3Q_Pos (Results 1 – 21 of 21) sorted by relevance

/hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_rcc.h4827 RCC_PLL3DIVR_PLL3Q_Pos)); in LL_RCC_PLL3_ConfigDomain_48M()
4943 MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3Q, (PLL3Q - 1UL) << RCC_PLL3DIVR_PLL3Q_Pos); in LL_RCC_PLL3_SetQ()
4954 return (uint32_t)((READ_BIT(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3Q) >> RCC_PLL3DIVR_PLL3Q_Pos) + 1UL); in LL_RCC_PLL3_GetQ()
Dstm32u5xx_hal_rcc_ex.h1357 … RCC_PLL3DIVR_PLL3Q_Pos) & \
/hal_stm32-3.6.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_rcc_ex.c1349 …Init->PLL3.PLL3Q = (uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_PLL3Q) >> RCC_PLL3DIVR_PLL3Q_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig()
1730 … RCC_PLL3DIVR_PLL3Q) >> RCC_PLL3DIVR_PLL3Q_Pos) + \ in HAL_RCCEx_GetPLL3ClockFreq()
/hal_stm32-3.6.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_rcc.h5004 MODIFY_REG(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3Q, (PLL3Q - 1UL) << RCC_PLL3DIVR_PLL3Q_Pos); in LL_RCC_PLL3_SetQ()
5015 return (uint32_t)((READ_BIT(RCC->PLL3DIVR, RCC_PLL3DIVR_PLL3Q) >> RCC_PLL3DIVR_PLL3Q_Pos) + 1UL); in LL_RCC_PLL3_GetQ()
Dstm32h5xx_hal_rcc_ex.h1656 … ((((__PLL3Q__) - 1U) << RCC_PLL3DIVR_PLL3Q_Pos) & RCC_PLL3DIVR_PLL3Q) | \
/hal_stm32-3.6.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_rcc_ex.c2554 …Init->PLL3.PLL3Q = (uint32_t)((RCC->PLL3DIVR & RCC_PLL3DIVR_PLL3Q) >> RCC_PLL3DIVR_PLL3Q_Pos) + 1U; in HAL_RCCEx_GetPeriphCLKConfig()
3116 … RCC_PLL3DIVR_PLL3Q_Pos) + \ in HAL_RCCEx_GetPLL3ClockFreq()
/hal_stm32-3.6.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h14226 #define RCC_PLL3DIVR_PLL3Q_Pos (16U) macro
14227 #define RCC_PLL3DIVR_PLL3Q_Msk (0x7FUL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x007F0000…
14229 #define RCC_PLL3DIVR_PLL3Q_0 (0x001UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00010000…
14230 #define RCC_PLL3DIVR_PLL3Q_1 (0x002UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00020000…
14231 #define RCC_PLL3DIVR_PLL3Q_2 (0x004UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00040000…
14232 #define RCC_PLL3DIVR_PLL3Q_3 (0x008UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00080000…
14233 #define RCC_PLL3DIVR_PLL3Q_4 (0x010UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00100000…
14234 #define RCC_PLL3DIVR_PLL3Q_5 (0x020UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00200020…
14235 #define RCC_PLL3DIVR_PLL3Q_6 (0x040UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00400000…
Dstm32u545xx.h14739 #define RCC_PLL3DIVR_PLL3Q_Pos (16U) macro
14740 #define RCC_PLL3DIVR_PLL3Q_Msk (0x7FUL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x007F0000…
14742 #define RCC_PLL3DIVR_PLL3Q_0 (0x001UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00010000…
14743 #define RCC_PLL3DIVR_PLL3Q_1 (0x002UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00020000…
14744 #define RCC_PLL3DIVR_PLL3Q_2 (0x004UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00040000…
14745 #define RCC_PLL3DIVR_PLL3Q_3 (0x008UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00080000…
14746 #define RCC_PLL3DIVR_PLL3Q_4 (0x010UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00100000…
14747 #define RCC_PLL3DIVR_PLL3Q_5 (0x020UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00200020…
14748 #define RCC_PLL3DIVR_PLL3Q_6 (0x040UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00400000…
Dstm32u575xx.h15597 #define RCC_PLL3DIVR_PLL3Q_Pos (16U) macro
15598 #define RCC_PLL3DIVR_PLL3Q_Msk (0x7FUL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x007F0000…
15600 #define RCC_PLL3DIVR_PLL3Q_0 (0x001UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00010000…
15601 #define RCC_PLL3DIVR_PLL3Q_1 (0x002UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00020000…
15602 #define RCC_PLL3DIVR_PLL3Q_2 (0x004UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00040000…
15603 #define RCC_PLL3DIVR_PLL3Q_3 (0x008UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00080000…
15604 #define RCC_PLL3DIVR_PLL3Q_4 (0x010UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00100000…
15605 #define RCC_PLL3DIVR_PLL3Q_5 (0x020UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00200020…
15606 #define RCC_PLL3DIVR_PLL3Q_6 (0x040UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00400000…
Dstm32u5f7xx.h18156 #define RCC_PLL3DIVR_PLL3Q_Pos (16U) macro
18157 #define RCC_PLL3DIVR_PLL3Q_Msk (0x7FUL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x007F0000…
18159 #define RCC_PLL3DIVR_PLL3Q_0 (0x001UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00010000…
18160 #define RCC_PLL3DIVR_PLL3Q_1 (0x002UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00020000…
18161 #define RCC_PLL3DIVR_PLL3Q_2 (0x004UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00040000…
18162 #define RCC_PLL3DIVR_PLL3Q_3 (0x008UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00080000…
18163 #define RCC_PLL3DIVR_PLL3Q_4 (0x010UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00100000…
18164 #define RCC_PLL3DIVR_PLL3Q_5 (0x020UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00200020…
18165 #define RCC_PLL3DIVR_PLL3Q_6 (0x040UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00400000…
Dstm32u595xx.h16623 #define RCC_PLL3DIVR_PLL3Q_Pos (16U) macro
16624 #define RCC_PLL3DIVR_PLL3Q_Msk (0x7FUL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x007F0000…
16626 #define RCC_PLL3DIVR_PLL3Q_0 (0x001UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00010000…
16627 #define RCC_PLL3DIVR_PLL3Q_1 (0x002UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00020000…
16628 #define RCC_PLL3DIVR_PLL3Q_2 (0x004UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00040000…
16629 #define RCC_PLL3DIVR_PLL3Q_3 (0x008UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00080000…
16630 #define RCC_PLL3DIVR_PLL3Q_4 (0x010UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00100000…
16631 #define RCC_PLL3DIVR_PLL3Q_5 (0x020UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00200020…
16632 #define RCC_PLL3DIVR_PLL3Q_6 (0x040UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00400000…
Dstm32u5a5xx.h17185 #define RCC_PLL3DIVR_PLL3Q_Pos (16U) macro
17186 #define RCC_PLL3DIVR_PLL3Q_Msk (0x7FUL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x007F0000…
17188 #define RCC_PLL3DIVR_PLL3Q_0 (0x001UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00010000…
17189 #define RCC_PLL3DIVR_PLL3Q_1 (0x002UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00020000…
17190 #define RCC_PLL3DIVR_PLL3Q_2 (0x004UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00040000…
17191 #define RCC_PLL3DIVR_PLL3Q_3 (0x008UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00080000…
17192 #define RCC_PLL3DIVR_PLL3Q_4 (0x010UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00100000…
17193 #define RCC_PLL3DIVR_PLL3Q_5 (0x020UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00200020…
17194 #define RCC_PLL3DIVR_PLL3Q_6 (0x040UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00400000…
Dstm32u585xx.h16159 #define RCC_PLL3DIVR_PLL3Q_Pos (16U) macro
16160 #define RCC_PLL3DIVR_PLL3Q_Msk (0x7FUL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x007F0000…
16162 #define RCC_PLL3DIVR_PLL3Q_0 (0x001UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00010000…
16163 #define RCC_PLL3DIVR_PLL3Q_1 (0x002UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00020000…
16164 #define RCC_PLL3DIVR_PLL3Q_2 (0x004UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00040000…
16165 #define RCC_PLL3DIVR_PLL3Q_3 (0x008UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00080000…
16166 #define RCC_PLL3DIVR_PLL3Q_4 (0x010UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00100000…
16167 #define RCC_PLL3DIVR_PLL3Q_5 (0x020UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00200020…
16168 #define RCC_PLL3DIVR_PLL3Q_6 (0x040UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00400000…
Dstm32u599xx.h20349 #define RCC_PLL3DIVR_PLL3Q_Pos (16U) macro
20350 #define RCC_PLL3DIVR_PLL3Q_Msk (0x7FUL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x007F0000…
20352 #define RCC_PLL3DIVR_PLL3Q_0 (0x001UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00010000…
20353 #define RCC_PLL3DIVR_PLL3Q_1 (0x002UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00020000…
20354 #define RCC_PLL3DIVR_PLL3Q_2 (0x004UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00040000…
20355 #define RCC_PLL3DIVR_PLL3Q_3 (0x008UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00080000…
20356 #define RCC_PLL3DIVR_PLL3Q_4 (0x010UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00100000…
20357 #define RCC_PLL3DIVR_PLL3Q_5 (0x020UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00200020…
20358 #define RCC_PLL3DIVR_PLL3Q_6 (0x040UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00400000…
Dstm32u5g7xx.h18718 #define RCC_PLL3DIVR_PLL3Q_Pos (16U) macro
18719 #define RCC_PLL3DIVR_PLL3Q_Msk (0x7FUL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x007F0000…
18721 #define RCC_PLL3DIVR_PLL3Q_0 (0x001UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00010000…
18722 #define RCC_PLL3DIVR_PLL3Q_1 (0x002UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00020000…
18723 #define RCC_PLL3DIVR_PLL3Q_2 (0x004UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00040000…
18724 #define RCC_PLL3DIVR_PLL3Q_3 (0x008UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00080000…
18725 #define RCC_PLL3DIVR_PLL3Q_4 (0x010UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00100000…
18726 #define RCC_PLL3DIVR_PLL3Q_5 (0x020UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00200020…
18727 #define RCC_PLL3DIVR_PLL3Q_6 (0x040UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00400000…
Dstm32u5a9xx.h20911 #define RCC_PLL3DIVR_PLL3Q_Pos (16U) macro
20912 #define RCC_PLL3DIVR_PLL3Q_Msk (0x7FUL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x007F0000…
20914 #define RCC_PLL3DIVR_PLL3Q_0 (0x001UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00010000…
20915 #define RCC_PLL3DIVR_PLL3Q_1 (0x002UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00020000…
20916 #define RCC_PLL3DIVR_PLL3Q_2 (0x004UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00040000…
20917 #define RCC_PLL3DIVR_PLL3Q_3 (0x008UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00080000…
20918 #define RCC_PLL3DIVR_PLL3Q_4 (0x010UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00100000…
20919 #define RCC_PLL3DIVR_PLL3Q_5 (0x020UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00200020…
20920 #define RCC_PLL3DIVR_PLL3Q_6 (0x040UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00400000…
Dstm32u5f9xx.h21285 #define RCC_PLL3DIVR_PLL3Q_Pos (16U) macro
21286 #define RCC_PLL3DIVR_PLL3Q_Msk (0x7FUL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x007F0000…
21288 #define RCC_PLL3DIVR_PLL3Q_0 (0x001UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00010000…
21289 #define RCC_PLL3DIVR_PLL3Q_1 (0x002UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00020000…
21290 #define RCC_PLL3DIVR_PLL3Q_2 (0x004UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00040000…
21291 #define RCC_PLL3DIVR_PLL3Q_3 (0x008UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00080000…
21292 #define RCC_PLL3DIVR_PLL3Q_4 (0x010UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00100000…
21293 #define RCC_PLL3DIVR_PLL3Q_5 (0x020UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00200020…
21294 #define RCC_PLL3DIVR_PLL3Q_6 (0x040UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00400000…
Dstm32u5g9xx.h21847 #define RCC_PLL3DIVR_PLL3Q_Pos (16U) macro
21848 #define RCC_PLL3DIVR_PLL3Q_Msk (0x7FUL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x007F0000…
21850 #define RCC_PLL3DIVR_PLL3Q_0 (0x001UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00010000…
21851 #define RCC_PLL3DIVR_PLL3Q_1 (0x002UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00020000…
21852 #define RCC_PLL3DIVR_PLL3Q_2 (0x004UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00040000…
21853 #define RCC_PLL3DIVR_PLL3Q_3 (0x008UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00080000…
21854 #define RCC_PLL3DIVR_PLL3Q_4 (0x010UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00100000…
21855 #define RCC_PLL3DIVR_PLL3Q_5 (0x020UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00200020…
21856 #define RCC_PLL3DIVR_PLL3Q_6 (0x040UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00400000…
/hal_stm32-3.6.0/stm32cube/stm32h5xx/soc/
Dstm32h562xx.h13504 #define RCC_PLL3DIVR_PLL3Q_Pos (16U) macro
13505 #define RCC_PLL3DIVR_PLL3Q_Msk (0x7FUL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x007F0000…
13507 #define RCC_PLL3DIVR_PLL3Q_0 (0x001UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00010000…
13508 #define RCC_PLL3DIVR_PLL3Q_1 (0x002UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00020000…
13509 #define RCC_PLL3DIVR_PLL3Q_2 (0x004UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00040000…
13510 #define RCC_PLL3DIVR_PLL3Q_3 (0x008UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00080000…
13511 #define RCC_PLL3DIVR_PLL3Q_4 (0x010UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00100000…
13512 #define RCC_PLL3DIVR_PLL3Q_5 (0x020UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00200020…
13513 #define RCC_PLL3DIVR_PLL3Q_6 (0x040UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00400000…
Dstm32h563xx.h15588 #define RCC_PLL3DIVR_PLL3Q_Pos (16U) macro
15589 #define RCC_PLL3DIVR_PLL3Q_Msk (0x7FUL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x007F0000…
15591 #define RCC_PLL3DIVR_PLL3Q_0 (0x001UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00010000…
15592 #define RCC_PLL3DIVR_PLL3Q_1 (0x002UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00020000…
15593 #define RCC_PLL3DIVR_PLL3Q_2 (0x004UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00040000…
15594 #define RCC_PLL3DIVR_PLL3Q_3 (0x008UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00080000…
15595 #define RCC_PLL3DIVR_PLL3Q_4 (0x010UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00100000…
15596 #define RCC_PLL3DIVR_PLL3Q_5 (0x020UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00200020…
15597 #define RCC_PLL3DIVR_PLL3Q_6 (0x040UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00400000…
Dstm32h573xx.h16133 #define RCC_PLL3DIVR_PLL3Q_Pos (16U) macro
16134 #define RCC_PLL3DIVR_PLL3Q_Msk (0x7FUL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x007F0000…
16136 #define RCC_PLL3DIVR_PLL3Q_0 (0x001UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00010000…
16137 #define RCC_PLL3DIVR_PLL3Q_1 (0x002UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00020000…
16138 #define RCC_PLL3DIVR_PLL3Q_2 (0x004UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00040000…
16139 #define RCC_PLL3DIVR_PLL3Q_3 (0x008UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00080000…
16140 #define RCC_PLL3DIVR_PLL3Q_4 (0x010UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00100000…
16141 #define RCC_PLL3DIVR_PLL3Q_5 (0x020UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00200020…
16142 #define RCC_PLL3DIVR_PLL3Q_6 (0x040UL << RCC_PLL3DIVR_PLL3Q_Pos) /*!< 0x00400000…