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Searched refs:RCC_CFGR_SW_PLL (Results 1 – 25 of 181) sorted by relevance

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/hal_stm32-3.6.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_rcc.h194 #define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
Dstm32l1xx_hal_rcc.h437 #define RCC_SYSCLKSOURCE_PLLCLK RCC_CFGR_SW_PLL /*!< PLL selected as system clock */
/hal_stm32-3.6.0/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc.h203 #define RCC_SYSCLKSOURCE_PLLCLK RCC_CFGR_SW_PLL
Dstm32f7xx_ll_rcc.h204 #define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
/hal_stm32-3.6.0/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_rcc.h217 #define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
Dstm32f0xx_hal_rcc.h395 #define RCC_SYSCLKSOURCE_PLLCLK RCC_CFGR_SW_PLL /*!< PLL selected as system clock */
/hal_stm32-3.6.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_rcc.h195 #define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
Dstm32f1xx_hal_rcc.h183 #define RCC_SYSCLKSOURCE_PLLCLK RCC_CFGR_SW_PLL /*!< PLL selected as system clock */
/hal_stm32-3.6.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_rcc.h239 #define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
Dstm32l0xx_hal_rcc.h447 #define RCC_SYSCLKSOURCE_PLLCLK RCC_CFGR_SW_PLL /*!< PLL selected as system clock */
/hal_stm32-3.6.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_rcc.h179 #define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
Dstm32f2xx_hal_rcc.h222 #define RCC_SYSCLKSOURCE_PLLCLK RCC_CFGR_SW_PLL
/hal_stm32-3.6.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc.h203 #define RCC_SYSCLKSOURCE_PLLCLK RCC_CFGR_SW_PLL
Dstm32f4xx_ll_rcc.h199 #define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
/hal_stm32-3.6.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_rcc.h218 #define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
Dstm32g4xx_hal_rcc.h330 #define RCC_SYSCLKSOURCE_PLLCLK RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
/hal_stm32-3.6.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_rcc.h428 #define RCC_SYSCLKSOURCE_PLLCLK RCC_CFGR_SW_PLL /*!< PLL selected as system clock */
Dstm32f3xx_ll_rcc.h209 #define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
/hal_stm32-3.6.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_rcc.h276 #define LL_RCC_SYS_CLKSOURCE_PLL RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
Dstm32l4xx_hal_rcc.h436 #define RCC_SYSCLKSOURCE_PLLCLK RCC_CFGR_SW_PLL /*!< PLL selection as system clock */
/hal_stm32-3.6.0/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h820 #define RCC_CFGR_SW_PLL 0x00000002U /*!< PLL selected as… macro
Dstm32f101xb.h835 #define RCC_CFGR_SW_PLL 0x00000002U /*!< PLL selected as… macro
/hal_stm32-3.6.0/stm32cube/stm32f0xx/soc/
Dstm32f070x6.h2847 #define RCC_CFGR_SW_PLL (0x00000002U) /*!< PLL selected as… macro
Dstm32f030x6.h2793 #define RCC_CFGR_SW_PLL (0x00000002U) /*!< PLL selected as… macro
Dstm32f030x8.h2823 #define RCC_CFGR_SW_PLL (0x00000002U) /*!< PLL selected as… macro

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