/hal_stm32-3.6.0/stm32cube/stm32l4xx/drivers/include/ |
D | stm32l4xx_ll_rcc.h | 482 #elif defined(RCC_CCIPR_SAI1SEL) 483 #define LL_RCC_SAI1_CLKSOURCE_PLLSAI1 RCC_CCIPR_SAI1SEL /*!… 485 #define LL_RCC_SAI1_CLKSOURCE_PLLSAI2 (RCC_CCIPR_SAI1SEL | (RCC_CCIPR_SAI1SEL_0 >> 16U)) /*!… 487 #define LL_RCC_SAI1_CLKSOURCE_PLL (RCC_CCIPR_SAI1SEL | (RCC_CCIPR_SAI1SEL_1 >> 16U)) /*!… 488 #define LL_RCC_SAI1_CLKSOURCE_PIN (RCC_CCIPR_SAI1SEL | (RCC_CCIPR_SAI1SEL >> 16U)) /*!… 729 #if defined(RCC_CCIPR_SAI1SEL) || defined(RCC_CCIPR2_SAI1SEL) 736 #define LL_RCC_SAI1_CLKSOURCE RCC_CCIPR_SAI1SEL /*!< SAI1 Clock source selection */ 3036 #if defined(RCC_CCIPR_SAI1SEL) || defined(RCC_CCIPR2_SAI1SEL) 3383 #if defined(RCC_CCIPR_SAI1SEL) || defined(RCC_CCIPR2_SAI1SEL)
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D | stm32l4xx_hal_rcc_ex.h | 537 #define RCC_SAI1CLKSOURCE_PIN RCC_CCIPR_SAI1SEL 1391 MODIFY_REG(RCC->CCIPR, RCC_CCIPR_SAI1SEL, (__SAI1_CLKSOURCE__)) 1410 #define __HAL_RCC_GET_SAI1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_SAI1SEL))
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/hal_stm32-3.6.0/stm32cube/stm32l4xx/drivers/src/ |
D | stm32l4xx_ll_rcc.c | 87 #elif defined(RCC_CCIPR_SAI1SEL) || defined(RCC_CCIPR2_SAI1SEL) 143 #if defined(RCC_CCIPR_SAI1SEL) || defined(RCC_CCIPR_SAI2SEL) || defined(RCC_CCIPR2_SAI1SEL) || defi… 839 #if defined(RCC_CCIPR_SAI1SEL) || defined(RCC_CCIPR_SAI2SEL) || defined(RCC_CCIPR2_SAI1SEL) || defi…
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/hal_stm32-3.6.0/stm32cube/stm32g4xx/drivers/include/ |
D | stm32g4xx_hal_rcc_ex.h | 831 MODIFY_REG(RCC->CCIPR, RCC_CCIPR_SAI1SEL, (__SAI1_CLKSOURCE__)) 841 #define __HAL_RCC_GET_SAI1_SOURCE() (READ_BIT(RCC->CCIPR, RCC_CCIPR_SAI1SEL))
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D | stm32g4xx_ll_rcc.h | 525 #define LL_RCC_SAI1_CLKSOURCE RCC_CCIPR_SAI1SEL /*!< SAI1 Clock source selection */ 1619 MODIFY_REG(RCC->CCIPR, RCC_CCIPR_SAI1SEL, SAIxSource); in LL_RCC_SetSAIClockSource()
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/hal_stm32-3.6.0/stm32cube/stm32wbxx/drivers/include/ |
D | stm32wbxx_ll_rcc.h | 499 #define LL_RCC_SAI1_CLKSOURCE_PIN RCC_CCIPR_SAI1SEL /*!< External input selected as S… 601 #define LL_RCC_SAI1_CLKSOURCE RCC_CCIPR_SAI1SEL /*!< SAI1 clock source selection bit… 2579 MODIFY_REG(RCC->CCIPR, RCC_CCIPR_SAI1SEL, SAIxSource); in LL_RCC_SetSAIClockSource()
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/hal_stm32-3.6.0/stm32cube/stm32g4xx/soc/ |
D | stm32g431xx.h | 8071 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32gbk1cb.h | 8043 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32g441xx.h | 8301 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32g4a1xx.h | 8703 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32g491xx.h | 8473 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32g473xx.h | 9190 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32g471xx.h | 8640 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32g483xx.h | 9420 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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/hal_stm32-3.6.0/stm32cube/stm32wbxx/soc/ |
D | stm32wb35xx.h | 7902 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32wb55xx.h | 8129 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32wb5mxx.h | 8129 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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/hal_stm32-3.6.0/stm32cube/stm32l4xx/soc/ |
D | stm32l451xx.h | 10367 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32l431xx.h | 10090 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32l433xx.h | 10200 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32l442xx.h | 9919 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32l432xx.h | 9694 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32l452xx.h | 10445 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32l443xx.h | 10425 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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D | stm32l462xx.h | 10670 #define RCC_CCIPR_SAI1SEL RCC_CCIPR_SAI1SEL_Msk macro
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