/hal_stm32-3.6.0/stm32cube/stm32wbxx/drivers/include/ |
D | stm32wbxx_hal_qspi.h | 275 #define QSPI_ADDRESS_16_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_0) /*!<16-bit address*/
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/hal_stm32-3.6.0/stm32cube/stm32l4xx/drivers/include/ |
D | stm32l4xx_hal_qspi.h | 305 #define QSPI_ADDRESS_16_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_0) /*!<16-bit address*/
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/hal_stm32-3.6.0/stm32cube/stm32g4xx/drivers/include/ |
D | stm32g4xx_hal_qspi.h | 300 #define QSPI_ADDRESS_16_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_0) /*!<16-bit address*/
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/hal_stm32-3.6.0/stm32cube/stm32h7xx/drivers/include/ |
D | stm32h7xx_hal_qspi.h | 296 #define QSPI_ADDRESS_16_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_0) /*!<16-bit address*/
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/hal_stm32-3.6.0/stm32cube/stm32f7xx/drivers/include/ |
D | stm32f7xx_hal_qspi.h | 300 #define QSPI_ADDRESS_16_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_0) /*!<16-bit address*/
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/hal_stm32-3.6.0/stm32cube/stm32f4xx/drivers/include/ |
D | stm32f4xx_hal_qspi.h | 300 #define QSPI_ADDRESS_16_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_0) /*!<16-bit address*/
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/hal_stm32-3.6.0/stm32cube/stm32mp1xx/drivers/include/ |
D | stm32mp1xx_hal_qspi.h | 301 #define QSPI_ADDRESS_16_BITS ((uint32_t)QUADSPI_CCR_ADSIZE_0) /*!<16-bit address*/
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/hal_stm32-3.6.0/stm32cube/stm32l4xx/soc/ |
D | stm32l412xx.h | 7436 #define QUADSPI_CCR_ADSIZE_0 (0x1UL << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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D | stm32l422xx.h | 7661 #define QUADSPI_CCR_ADSIZE_0 (0x1UL << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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D | stm32l451xx.h | 12181 #define QUADSPI_CCR_ADSIZE_0 (0x1UL << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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D | stm32l431xx.h | 11897 #define QUADSPI_CCR_ADSIZE_0 (0x1UL << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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D | stm32l433xx.h | 12126 #define QUADSPI_CCR_ADSIZE_0 (0x1UL << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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/hal_stm32-3.6.0/stm32cube/stm32wbxx/soc/ |
D | stm32wb35xx.h | 7018 #define QUADSPI_CCR_ADSIZE_0 (0x1U << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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D | stm32wb55xx.h | 7209 #define QUADSPI_CCR_ADSIZE_0 (0x1U << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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D | stm32wb5mxx.h | 7209 #define QUADSPI_CCR_ADSIZE_0 (0x1U << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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/hal_stm32-3.6.0/stm32cube/stm32g4xx/soc/ |
D | stm32g4a1xx.h | 7734 #define QUADSPI_CCR_ADSIZE_0 (0x1UL << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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D | stm32g491xx.h | 7513 #define QUADSPI_CCR_ADSIZE_0 (0x1UL << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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D | stm32g473xx.h | 8176 #define QUADSPI_CCR_ADSIZE_0 (0x1UL << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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D | stm32g471xx.h | 7662 #define QUADSPI_CCR_ADSIZE_0 (0x1UL << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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D | stm32g483xx.h | 8397 #define QUADSPI_CCR_ADSIZE_0 (0x1UL << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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/hal_stm32-3.6.0/stm32cube/stm32f4xx/soc/ |
D | stm32f412zx.h | 9144 #define QUADSPI_CCR_ADSIZE_0 (0x1UL << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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D | stm32f413xx.h | 9378 #define QUADSPI_CCR_ADSIZE_0 (0x1UL << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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D | stm32f412vx.h | 9140 #define QUADSPI_CCR_ADSIZE_0 (0x1UL << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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/hal_stm32-3.6.0/stm32cube/stm32f7xx/soc/ |
D | stm32f722xx.h | 9018 #define QUADSPI_CCR_ADSIZE_0 (0x1UL << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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D | stm32f723xx.h | 9034 #define QUADSPI_CCR_ADSIZE_0 (0x1UL << QUADSPI_CCR_ADSIZE_Pos) /*!< 0x00001000 */ macro
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