Searched refs:DMA_IFCR_CHTIF3_Pos (Results 1 – 25 of 149) sorted by relevance
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2947 #define DMA_IFCR_CHTIF3_Pos (10U) macro2948 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
3009 #define DMA_IFCR_CHTIF3_Pos (10U) macro3010 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
3161 #define DMA_IFCR_CHTIF3_Pos (10U) macro3162 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
2996 #define DMA_IFCR_CHTIF3_Pos (10U) macro2997 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
3508 #define DMA_IFCR_CHTIF3_Pos (10U) macro3509 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1097 #define DMA_IFCR_CHTIF3_Pos (10U) macro1098 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1052 #define DMA_IFCR_CHTIF3_Pos (10U) macro1053 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1074 #define DMA_IFCR_CHTIF3_Pos (10U) macro1075 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1129 #define DMA_IFCR_CHTIF3_Pos (10U) macro1130 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1093 #define DMA_IFCR_CHTIF3_Pos (10U) macro1094 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1068 #define DMA_IFCR_CHTIF3_Pos (10U) macro1069 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1067 #define DMA_IFCR_CHTIF3_Pos (10U) macro1068 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1509 #define DMA_IFCR_CHTIF3_Pos (10U) macro1510 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1508 #define DMA_IFCR_CHTIF3_Pos (10U) macro1509 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1247 #define DMA_IFCR_CHTIF3_Pos (10U) macro1248 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1089 #define DMA_IFCR_CHTIF3_Pos (10U) macro1090 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1170 #define DMA_IFCR_CHTIF3_Pos (10U) macro1171 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1298 #define DMA_IFCR_CHTIF3_Pos (10U) macro1299 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1206 #define DMA_IFCR_CHTIF3_Pos (10U) macro1207 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1334 #define DMA_IFCR_CHTIF3_Pos (10U) macro1335 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1095 #define DMA_IFCR_CHTIF3_Pos (10U) macro1096 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1105 #define DMA_IFCR_CHTIF3_Pos (10U) macro1106 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1278 #define DMA_IFCR_CHTIF3_Pos (10U) macro1279 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
1406 #define DMA_IFCR_CHTIF3_Pos (10U) macro1407 #define DMA_IFCR_CHTIF3_Msk (0x1UL << DMA_IFCR_CHTIF3_Pos) /*!< 0x00000400 */
