Home
last modified time | relevance | path

Searched refs:DMA_CLLR_UT3_Msk (Results 1 – 16 of 16) sorted by relevance

/hal_stm32-3.6.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h4000 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
4001 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32h562xx.h5757 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
5758 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32h563xx.h7841 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
7842 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32h573xx.h8276 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
8277 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
/hal_stm32-3.6.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h6028 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
6029 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u545xx.h6428 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
6429 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u575xx.h6427 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
6428 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u5f7xx.h6977 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
6978 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u595xx.h6681 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
6682 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u5a5xx.h7130 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
7131 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u585xx.h6876 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
6877 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u599xx.h6969 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
6970 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u5g7xx.h7426 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
7427 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u5a9xx.h7418 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
7419 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u5f9xx.h7097 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
7098 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…
Dstm32u5g9xx.h7546 #define DMA_CLLR_UT3_Msk (0x1UL << DMA_CLLR_UT3_Pos) /*!< 0x04000000… macro
7547 #define DMA_CLLR_UT3 DMA_CLLR_UT3_Msk /*!< Update tra…