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Searched refs:DMA_CCR_SUSP_Msk (Results 1 – 20 of 20) sorted by relevance

/hal_stm32-3.6.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2218 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
2219 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32wba52xx.h2802 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
2803 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32wba54xx.h2985 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
2986 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32wba55xx.h2985 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
2986 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
/hal_stm32-3.6.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3829 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
3830 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32h562xx.h5580 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
5581 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32h563xx.h7664 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
7665 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32h573xx.h8099 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
8100 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
/hal_stm32-3.6.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h5854 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
5855 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32u545xx.h6254 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
6255 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32u575xx.h6253 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
6254 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32u5f7xx.h6803 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
6804 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32u595xx.h6507 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
6508 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32u5a5xx.h6956 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
6957 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32u585xx.h6702 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
6703 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32u599xx.h6795 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
6796 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32u5g7xx.h7252 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
7253 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32u5a9xx.h7244 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
7245 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32u5f9xx.h6923 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
6924 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…
Dstm32u5g9xx.h7372 #define DMA_CCR_SUSP_Msk (0x1UL << DMA_CCR_SUSP_Pos) /*!< 0x00000004… macro
7373 #define DMA_CCR_SUSP DMA_CCR_SUSP_Msk /*!< Channel su…