/hal_stm32-3.6.0/stm32cube/stm32c0xx/soc/ |
D | stm32c031xx.h | 1192 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1223 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32c011xx.h | 1188 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1219 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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/hal_stm32-3.6.0/stm32cube/stm32g0xx/soc/ |
D | stm32g070xx.h | 1251 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1282 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32g050xx.h | 1248 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1279 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32g030xx.h | 1229 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1260 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32g051xx.h | 1335 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1366 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32g031xx.h | 1272 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1303 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32g041xx.h | 1319 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1350 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32g061xx.h | 1382 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1413 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32g071xx.h | 1384 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1415 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32g0b0xx.h | 1333 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1364 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32g081xx.h | 1431 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1462 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32g0b1xx.h | 1551 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1582 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32g0c1xx.h | 1598 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1629 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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/hal_stm32-3.6.0/stm32cube/stm32wlxx/soc/ |
D | stm32wle4xx.h | 1555 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1586 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32wle5xx.h | 1555 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1586 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32wl54xx.h | 1737 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1768 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32wl55xx.h | 1737 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1768 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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D | stm32wl5mxx.h | 1737 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro 1768 #define ADC_TR3_LT3_4 ADC_AWD3TR_LT3_4
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/hal_stm32-3.6.0/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 1616 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro
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D | stm32wba52xx.h | 2096 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro
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D | stm32wba54xx.h | 2212 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro
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D | stm32wba55xx.h | 2212 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro
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/hal_stm32-3.6.0/stm32cube/stm32u5xx/soc/ |
D | stm32u535xx.h | 4327 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro
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D | stm32u545xx.h | 4491 #define ADC_AWD3TR_LT3_4 (0x010UL << ADC_AWD3TR_LT3_Pos) /*!< 0x00000010 */ macro
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