/hal_stm32-3.6.0/stm32cube/stm32c0xx/soc/ |
D | stm32c031xx.h | 945 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 974 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32c011xx.h | 941 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 970 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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/hal_stm32-3.6.0/stm32cube/stm32g0xx/soc/ |
D | stm32g070xx.h | 1016 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1045 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32g050xx.h | 1013 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1042 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32g030xx.h | 994 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1023 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32g051xx.h | 1100 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1129 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32g031xx.h | 1037 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1066 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32g041xx.h | 1084 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1113 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32g061xx.h | 1147 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1176 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32g071xx.h | 1149 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1178 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32g0b0xx.h | 1098 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1127 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32g081xx.h | 1196 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1225 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32g0b1xx.h | 1316 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1345 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32g0c1xx.h | 1363 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1392 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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/hal_stm32-3.6.0/stm32cube/stm32wlxx/soc/ |
D | stm32wle4xx.h | 1323 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1352 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32wle5xx.h | 1323 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1352 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32wl54xx.h | 1505 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1534 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32wl55xx.h | 1505 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1534 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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D | stm32wl5mxx.h | 1505 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro 1534 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
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/hal_stm32-3.6.0/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 1442 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
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D | stm32wba52xx.h | 1922 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
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D | stm32wba54xx.h | 2038 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
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D | stm32wba55xx.h | 2038 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
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/hal_stm32-3.6.0/stm32cube/stm32u5xx/soc/ |
D | stm32u535xx.h | 4134 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
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D | stm32u545xx.h | 4298 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
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