Searched refs:reg_mpcbb (Results 1 – 4 of 4) sorted by relevance
1427 __IO uint32_t *reg_mpcbb; in HAL_GTZC_MPCBB_LockConfig() local1446 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB1_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1454 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB2_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1463 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB3_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1472 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB4_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1481 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB5_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1491 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB6_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1508 SET_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()1512 CLEAR_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()1527 reg_mpcbb++; in HAL_GTZC_MPCBB_LockConfig()[all …]
950 __IO uint32_t *reg_mpcbb; in HAL_GTZC_MPCBB_LockConfig() local970 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB1_S->CFGLOCK; in HAL_GTZC_MPCBB_LockConfig()979 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB2_S->CFGLOCK; in HAL_GTZC_MPCBB_LockConfig()989 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB6_S->CFGLOCK; in HAL_GTZC_MPCBB_LockConfig()1004 SET_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()1008 CLEAR_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()1043 uint32_t reg_mpcbb; in HAL_GTZC_MPCBB_GetLockConfig() local1063 reg_mpcbb = GTZC_MPCBB1_S->CFGLOCK; in HAL_GTZC_MPCBB_GetLockConfig()1073 reg_mpcbb = GTZC_MPCBB2_S->CFGLOCK; in HAL_GTZC_MPCBB_GetLockConfig()1083 reg_mpcbb = GTZC_MPCBB6_S->CFGLOCK; in HAL_GTZC_MPCBB_GetLockConfig()[all …]
1281 __IO uint32_t *reg_mpcbb; in HAL_GTZC_MPCBB_LockConfig() local1301 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB1_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1310 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB2_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1319 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB3_S->CFGLOCKR1; in HAL_GTZC_MPCBB_LockConfig()1335 SET_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()1339 CLEAR_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()1374 uint32_t reg_mpcbb; in HAL_GTZC_MPCBB_GetLockConfig() local1394 reg_mpcbb = GTZC_MPCBB1_S->CFGLOCKR1; in HAL_GTZC_MPCBB_GetLockConfig()1404 reg_mpcbb = GTZC_MPCBB2_S->CFGLOCKR1; in HAL_GTZC_MPCBB_GetLockConfig()1414 reg_mpcbb = GTZC_MPCBB3_S->CFGLOCKR1; in HAL_GTZC_MPCBB_GetLockConfig()[all …]
1010 __IO uint32_t *reg_mpcbb; in HAL_GTZC_MPCBB_LockConfig() local1029 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB1_S->LCKVTR1; in HAL_GTZC_MPCBB_LockConfig()1038 reg_mpcbb = (__IO uint32_t *)>ZC_MPCBB2_S->LCKVTR1; in HAL_GTZC_MPCBB_LockConfig()1053 SET_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()1057 CLEAR_BIT(*reg_mpcbb, 1UL << (offset_bit_start % 32U)); in HAL_GTZC_MPCBB_LockConfig()1092 uint32_t reg_mpcbb; in HAL_GTZC_MPCBB_GetLockConfig() local1111 reg_mpcbb = GTZC_MPCBB1_S->LCKVTR1; in HAL_GTZC_MPCBB_GetLockConfig()1120 reg_mpcbb = GTZC_MPCBB2_S->LCKVTR1; in HAL_GTZC_MPCBB_GetLockConfig()1133 pLockAttributes[i] = (reg_mpcbb & (1UL << (offset_bit_start % 32U))) in HAL_GTZC_MPCBB_GetLockConfig()
