/hal_stm32-3.5.0/stm32cube/stm32f0xx/soc/ |
D | stm32f058xx.h | 5850 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 5851 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32f051x8.h | 5881 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 5882 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32f071xb.h | 6434 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 6435 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32f048xx.h | 9620 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 9621 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32f042x6.h | 9656 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 9657 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32f098xx.h | 10855 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 10856 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32f078xx.h | 10201 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 10202 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32f072xb.h | 10231 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 10232 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32f091xc.h | 10888 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 10889 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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/hal_stm32-3.5.0/stm32cube/stm32l0xx/soc/ |
D | stm32l053xx.h | 6566 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 6567 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32l062xx.h | 6544 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 6545 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32l052xx.h | 6407 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 6408 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32l073xx.h | 6862 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 6863 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32l083xx.h | 6999 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 7000 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32l082xx.h | 6840 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 6841 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32l072xx.h | 6703 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 6704 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32l063xx.h | 6701 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 6702 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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/hal_stm32-3.5.0/stm32cube/stm32f3xx/soc/ |
D | stm32f301x8.h | 7668 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 7669 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32f318xx.h | 7655 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 7656 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32f373xc.h | 10842 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 10843 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32f378xx.h | 10740 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 10741 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32f303x8.h | 11161 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 11162 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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/hal_stm32-3.5.0/stm32cube/stm32wbxx/soc/Include/ |
D | stm32wb15xx.h | 8297 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 8298 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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D | stm32wb10xx.h | 8125 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 8126 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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/hal_stm32-3.5.0/stm32cube/stm32wbxx/soc/ |
D | stm32wb1mxx.h | 8297 #define TSC_IOCCR_G7_IO4_Pos (27U) macro 8298 #define TSC_IOCCR_G7_IO4_Msk (0x1UL << TSC_IOCCR_G7_IO4_Pos) /*!< 0x08000000 */
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