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Searched refs:TSC_IOCCR_G7_IO2_Pos (Results 1 – 25 of 73) sorted by relevance

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/hal_stm32-3.5.0/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5844 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
5845 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32f051x8.h5875 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
5876 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32f071xb.h6428 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
6429 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32f048xx.h9614 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
9615 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32f042x6.h9650 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
9651 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32f098xx.h10849 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
10850 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32f078xx.h10195 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
10196 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32f072xb.h10225 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
10226 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32f091xc.h10882 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
10883 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
/hal_stm32-3.5.0/stm32cube/stm32l0xx/soc/
Dstm32l053xx.h6560 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
6561 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32l062xx.h6538 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
6539 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32l052xx.h6401 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
6402 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32l073xx.h6856 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
6857 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32l083xx.h6993 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
6994 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32l082xx.h6834 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
6835 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32l072xx.h6697 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
6698 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32l063xx.h6695 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
6696 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
/hal_stm32-3.5.0/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7662 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
7663 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32f318xx.h7649 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
7650 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32f373xc.h10836 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
10837 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32f378xx.h10734 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
10735 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32f303x8.h11155 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
11156 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
/hal_stm32-3.5.0/stm32cube/stm32wbxx/soc/Include/
Dstm32wb15xx.h8291 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
8292 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
Dstm32wb10xx.h8119 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
8120 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
/hal_stm32-3.5.0/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8291 #define TSC_IOCCR_G7_IO2_Pos (25U) macro
8292 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */

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