/hal_stm32-3.5.0/stm32cube/stm32f0xx/soc/ |
D | stm32f058xx.h | 5844 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 5845 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32f051x8.h | 5875 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 5876 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32f071xb.h | 6428 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 6429 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32f048xx.h | 9614 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 9615 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32f042x6.h | 9650 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 9651 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32f098xx.h | 10849 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 10850 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32f078xx.h | 10195 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 10196 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32f072xb.h | 10225 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 10226 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32f091xc.h | 10882 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 10883 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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/hal_stm32-3.5.0/stm32cube/stm32l0xx/soc/ |
D | stm32l053xx.h | 6560 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 6561 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32l062xx.h | 6538 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 6539 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32l052xx.h | 6401 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 6402 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32l073xx.h | 6856 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 6857 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32l083xx.h | 6993 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 6994 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32l082xx.h | 6834 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 6835 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32l072xx.h | 6697 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 6698 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32l063xx.h | 6695 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 6696 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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/hal_stm32-3.5.0/stm32cube/stm32f3xx/soc/ |
D | stm32f301x8.h | 7662 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 7663 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32f318xx.h | 7649 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 7650 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32f373xc.h | 10836 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 10837 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32f378xx.h | 10734 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 10735 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32f303x8.h | 11155 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 11156 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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/hal_stm32-3.5.0/stm32cube/stm32wbxx/soc/Include/ |
D | stm32wb15xx.h | 8291 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 8292 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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D | stm32wb10xx.h | 8119 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 8120 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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/hal_stm32-3.5.0/stm32cube/stm32wbxx/soc/ |
D | stm32wb1mxx.h | 8291 #define TSC_IOCCR_G7_IO2_Pos (25U) macro 8292 #define TSC_IOCCR_G7_IO2_Msk (0x1UL << TSC_IOCCR_G7_IO2_Pos) /*!< 0x02000000 */
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