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Searched refs:GTZC_BASE_ADDRESS (Results 1 – 4 of 4) sorted by relevance

/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_gtzc.c225 #define GTZC_BASE_ADDRESS(mem)\ macro
1445 base_address = GTZC_BASE_ADDRESS(SRAM1); in HAL_GTZC_MPCBB_LockConfig()
1453 base_address = GTZC_BASE_ADDRESS(SRAM2); in HAL_GTZC_MPCBB_LockConfig()
1462 base_address = GTZC_BASE_ADDRESS(SRAM3); in HAL_GTZC_MPCBB_LockConfig()
1471 base_address = GTZC_BASE_ADDRESS(SRAM4); in HAL_GTZC_MPCBB_LockConfig()
1480 base_address = GTZC_BASE_ADDRESS(SRAM5); in HAL_GTZC_MPCBB_LockConfig()
1490 base_address = GTZC_BASE_ADDRESS(SRAM6); in HAL_GTZC_MPCBB_LockConfig()
1593 base_address = GTZC_BASE_ADDRESS(SRAM1); in HAL_GTZC_MPCBB_GetLockConfig()
1602 base_address = GTZC_BASE_ADDRESS(SRAM2); in HAL_GTZC_MPCBB_GetLockConfig()
1612 base_address = GTZC_BASE_ADDRESS(SRAM3); in HAL_GTZC_MPCBB_GetLockConfig()
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/hal_stm32-3.5.0/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_gtzc.c179 #define GTZC_BASE_ADDRESS(mem)\ macro
968 base_address = GTZC_BASE_ADDRESS(SRAM1); in HAL_GTZC_MPCBB_LockConfig()
977 base_address = GTZC_BASE_ADDRESS(SRAM2); in HAL_GTZC_MPCBB_LockConfig()
987 base_address = GTZC_BASE_ADDRESS(SRAM6); in HAL_GTZC_MPCBB_LockConfig()
1061 base_address = GTZC_BASE_ADDRESS(SRAM1); in HAL_GTZC_MPCBB_GetLockConfig()
1071 base_address = GTZC_BASE_ADDRESS(SRAM2); in HAL_GTZC_MPCBB_GetLockConfig()
1081 base_address = GTZC_BASE_ADDRESS(SRAM6); in HAL_GTZC_MPCBB_GetLockConfig()
/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_gtzc.c189 #define GTZC_BASE_ADDRESS(mem)\ macro
1299 base_address = GTZC_BASE_ADDRESS(SRAM1); in HAL_GTZC_MPCBB_LockConfig()
1308 base_address = GTZC_BASE_ADDRESS(SRAM2); in HAL_GTZC_MPCBB_LockConfig()
1317 base_address = GTZC_BASE_ADDRESS(SRAM3); in HAL_GTZC_MPCBB_LockConfig()
1392 base_address = GTZC_BASE_ADDRESS(SRAM1); in HAL_GTZC_MPCBB_GetLockConfig()
1402 base_address = GTZC_BASE_ADDRESS(SRAM2); in HAL_GTZC_MPCBB_GetLockConfig()
1412 base_address = GTZC_BASE_ADDRESS(SRAM3); in HAL_GTZC_MPCBB_GetLockConfig()
/hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_gtzc.c173 #define GTZC_BASE_ADDRESS(mem)\ macro
1027 base_address = GTZC_BASE_ADDRESS(SRAM1); in HAL_GTZC_MPCBB_LockConfig()
1036 base_address = GTZC_BASE_ADDRESS(SRAM2); in HAL_GTZC_MPCBB_LockConfig()
1109 base_address = GTZC_BASE_ADDRESS(SRAM1); in HAL_GTZC_MPCBB_GetLockConfig()
1118 base_address = GTZC_BASE_ADDRESS(SRAM2); in HAL_GTZC_MPCBB_GetLockConfig()