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Searched refs:EXTI_IMR1_IM20_Msk (Results 1 – 25 of 113) sorted by relevance

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/hal_stm32-3.5.0/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h2173 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
2174 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< Interrupt Mask …
Dstm32c031xx.h2177 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
2178 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< Interrupt Mask …
/hal_stm32-3.5.0/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h3527 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3528 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< CPU1 Interrupt …
Dstm32wle5xx.h3527 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3528 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< CPU1 Interrupt …
Dstm32wl54xx.h3745 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3746 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< CPU1 Interrupt …
Dstm32wl55xx.h3745 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3746 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< CPU1 Interrupt …
Dstm32wl5mxx.h3745 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3746 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< CPU1 Interrupt …
/hal_stm32-3.5.0/stm32cube/stm32wbxx/soc/Include/
Dstm32wb15xx.h2655 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
2656 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< CPU1 Interrupt …
/hal_stm32-3.5.0/stm32cube/stm32g0xx/soc/
Dstm32g0c1xx.h3392 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3393 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< Interrupt Mask …
Dstm32g0b1xx.h3156 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3157 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< Interrupt Mask …
/hal_stm32-3.5.0/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h2655 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
2656 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< CPU1 Interrupt …
Dstm32wb35xx.h3355 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3356 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< CPU1 Interrupt …
Dstm32wb5mxx.h3401 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3402 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< CPU1 Interrupt …
Dstm32wb55xx.h3401 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3402 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< CPU1 Interrupt …
/hal_stm32-3.5.0/stm32cube/stm32l4xx/soc/
Dstm32l412xx.h2672 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
2673 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< Interrupt Mask …
Dstm32l422xx.h2888 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
2889 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< Interrupt Mask …
/hal_stm32-3.5.0/stm32cube/stm32g4xx/soc/
Dstm32gbk1cb.h3488 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3489 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< Interrupt Mask …
Dstm32g431xx.h3502 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3503 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< Interrupt Mask …
Dstm32g441xx.h3723 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3724 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< Interrupt Mask …
Dstm32g471xx.h3672 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3673 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< Interrupt Mask …
Dstm32g4a1xx.h3878 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3879 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< Interrupt Mask …
Dstm32g473xx.h3753 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3754 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< Interrupt Mask …
Dstm32g491xx.h3657 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3658 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< Interrupt Mask …
Dstm32g483xx.h3974 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000 */ macro
3975 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< Interrupt Mask …
/hal_stm32-3.5.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h4914 #define EXTI_IMR1_IM20_Msk (0x1UL << EXTI_IMR1_IM20_Pos) /*!< 0x00100000… macro
4915 #define EXTI_IMR1_IM20 EXTI_IMR1_IM20_Msk /*!< Interrupt …

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