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Searched refs:DMA_SMISR_MIS5_Pos (Results 1 – 19 of 19) sorted by relevance

/hal_stm32-3.5.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2144 #define DMA_SMISR_MIS5_Pos (5U) macro
2145 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32wba52xx.h2727 #define DMA_SMISR_MIS5_Pos (5U) macro
2728 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32wba54xx.h2909 #define DMA_SMISR_MIS5_Pos (5U) macro
2910 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32wba55xx.h2909 #define DMA_SMISR_MIS5_Pos (5U) macro
2910 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
/hal_stm32-3.5.0/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h6155 #define DMA_SMISR_MIS5_Pos (5U) macro
6156 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32u535xx.h5755 #define DMA_SMISR_MIS5_Pos (5U) macro
5756 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32u575xx.h6154 #define DMA_SMISR_MIS5_Pos (5U) macro
6155 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32u5a5xx.h6857 #define DMA_SMISR_MIS5_Pos (5U) macro
6858 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32u585xx.h6603 #define DMA_SMISR_MIS5_Pos (5U) macro
6604 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32u5f7xx.h6704 #define DMA_SMISR_MIS5_Pos (5U) macro
6705 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32u595xx.h6408 #define DMA_SMISR_MIS5_Pos (5U) macro
6409 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32u599xx.h6696 #define DMA_SMISR_MIS5_Pos (5U) macro
6697 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32u5g7xx.h7153 #define DMA_SMISR_MIS5_Pos (5U) macro
7154 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32u5a9xx.h7145 #define DMA_SMISR_MIS5_Pos (5U) macro
7146 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32u5g9xx.h7273 #define DMA_SMISR_MIS5_Pos (5U) macro
7274 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32u5f9xx.h6824 #define DMA_SMISR_MIS5_Pos (5U) macro
6825 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
/hal_stm32-3.5.0/stm32cube/stm32h5xx/soc/
Dstm32h562xx.h5474 #define DMA_SMISR_MIS5_Pos (5U) macro
5475 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32h563xx.h7558 #define DMA_SMISR_MIS5_Pos (5U) macro
7559 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…
Dstm32h573xx.h7993 #define DMA_SMISR_MIS5_Pos (5U) macro
7994 #define DMA_SMISR_MIS5_Msk (0x1UL << DMA_SMISR_MIS5_Pos) /*!< 0x00000020…