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Searched refs:DMA_MISR_MIS0_Pos (Results 1 – 20 of 20) sorted by relevance

/hal_stm32-3.5.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2103 #define DMA_MISR_MIS0_Pos (0U) macro
2104 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32wba52xx.h2686 #define DMA_MISR_MIS0_Pos (0U) macro
2687 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32wba54xx.h2868 #define DMA_MISR_MIS0_Pos (0U) macro
2869 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32wba55xx.h2868 #define DMA_MISR_MIS0_Pos (0U) macro
2869 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
/hal_stm32-3.5.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3754 #define DMA_MISR_MIS0_Pos (0U) macro
3755 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32h562xx.h5433 #define DMA_MISR_MIS0_Pos (0U) macro
5434 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32h563xx.h7517 #define DMA_MISR_MIS0_Pos (0U) macro
7518 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32h573xx.h7952 #define DMA_MISR_MIS0_Pos (0U) macro
7953 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
/hal_stm32-3.5.0/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h6090 #define DMA_MISR_MIS0_Pos (0U) macro
6091 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32u535xx.h5690 #define DMA_MISR_MIS0_Pos (0U) macro
5691 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32u575xx.h6089 #define DMA_MISR_MIS0_Pos (0U) macro
6090 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32u5a5xx.h6792 #define DMA_MISR_MIS0_Pos (0U) macro
6793 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32u585xx.h6538 #define DMA_MISR_MIS0_Pos (0U) macro
6539 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32u5f7xx.h6639 #define DMA_MISR_MIS0_Pos (0U) macro
6640 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32u595xx.h6343 #define DMA_MISR_MIS0_Pos (0U) macro
6344 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32u599xx.h6631 #define DMA_MISR_MIS0_Pos (0U) macro
6632 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32u5g7xx.h7088 #define DMA_MISR_MIS0_Pos (0U) macro
7089 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32u5a9xx.h7080 #define DMA_MISR_MIS0_Pos (0U) macro
7081 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32u5g9xx.h7208 #define DMA_MISR_MIS0_Pos (0U) macro
7209 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…
Dstm32u5f9xx.h6759 #define DMA_MISR_MIS0_Pos (0U) macro
6760 #define DMA_MISR_MIS0_Msk (0x1UL << DMA_MISR_MIS0_Pos) /*!< 0x00000001…