/hal_stm32-3.5.0/stm32cube/stm32f4xx/drivers/src/ |
D | stm32f4xx_hal_cryp.c | 322 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{(__HANDLE__)->Instance->CR &= (uint32_t)(~CRYP_CR… macro 329 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{(__HANDLE__)->Instance->CR &= (uint32_t)(~AES_CR_… macro 3711 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process() 3802 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process() 3810 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process() 3913 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT() 3995 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT() 4009 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT() 4110 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process_IT() 4188 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA() [all …]
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/hal_stm32-3.5.0/stm32cube/stm32f7xx/drivers/src/ |
D | stm32f7xx_hal_cryp.c | 322 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{(__HANDLE__)->Instance->CR &= (uint32_t)(~CRYP_CR… macro 329 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{(__HANDLE__)->Instance->CR &= (uint32_t)(~AES_CR_… macro 3705 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process() 3796 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process() 3804 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process() 3907 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT() 3989 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT() 4003 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT() 4104 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process_IT() 4182 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA() [all …]
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/hal_stm32-3.5.0/stm32cube/stm32mp1xx/drivers/src/ |
D | stm32mp1xx_hal_cryp.c | 318 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{(__HANDLE__)->Instance->CR &= (uint32_t)(~CRYP_CR… macro 3184 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process() 3241 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process() 3410 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT() 3447 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT() 3506 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA() 3559 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process_DMA() 3723 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process() 3786 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESCCM_Process() 3956 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT() [all …]
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/hal_stm32-3.5.0/stm32cube/stm32g4xx/drivers/src/ |
D | stm32g4xx_hal_cryp.c | 353 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) MODIFY_REG((__HANDLE__)->Instance->CR, AES_CR_GCMPH… macro 2572 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt() 3105 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process() 3146 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process() 3329 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT() 3370 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT() 3667 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA() 3777 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process() 3987 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT() 4028 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT() [all …]
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/hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/src/ |
D | stm32wbxx_hal_cryp.c | 353 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) MODIFY_REG((__HANDLE__)->Instance->CR, AES_CR_GCMPH… macro 2580 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt() 3114 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process() 3155 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process() 3339 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT() 3379 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT() 3676 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA() 3785 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process() 3996 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT() 4036 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT() [all …]
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/hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/src/ |
D | stm32l5xx_hal_cryp.c | 353 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) MODIFY_REG((__HANDLE__)->Instance->CR, AES_CR_GCMPH… macro 2572 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt() 3105 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process() 3146 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process() 3329 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT() 3370 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT() 3667 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA() 3777 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process() 3987 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT() 4028 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT() [all …]
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/hal_stm32-3.5.0/stm32cube/stm32g0xx/drivers/src/ |
D | stm32g0xx_hal_cryp.c | 353 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) MODIFY_REG((__HANDLE__)->Instance->CR, AES_CR_GCMPH… macro 2572 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt() 3105 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process() 3146 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process() 3329 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT() 3370 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT() 3667 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA() 3777 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process() 3987 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT() 4028 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT() [all …]
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/hal_stm32-3.5.0/stm32cube/stm32h7xx/drivers/src/ |
D | stm32h7xx_hal_cryp.c | 320 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) do{(__HANDLE__)->Instance->CR &= (uint32_t)(~CRYP_CR… macro 2939 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process() 3002 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process() 3186 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT() 3223 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT() 3282 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA() 3340 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process_DMA() 3507 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process() 3619 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESCCM_Process() 3804 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT() [all …]
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/hal_stm32-3.5.0/stm32cube/stm32wlxx/drivers/src/ |
D | stm32wlxx_hal_cryp.c | 353 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__) MODIFY_REG((__HANDLE__)->Instance->CR, AES_CR_GCMPH… macro 2742 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt() 3275 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process() 3316 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process() 3499 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT() 3540 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT() 3837 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA() 3947 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process() 4157 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT() 4198 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT() [all …]
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/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/src/ |
D | stm32u5xx_hal_cryp.c | 344 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__)\ macro 3024 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt() 3645 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process() 3682 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process() 3860 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT() 3900 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT() 4198 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA() 4306 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process() 4508 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT() 4551 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT() [all …]
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/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/src/ |
D | stm32h5xx_hal_cryp.c | 344 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__)\ macro 3057 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt() 3678 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process() 3751 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process() 3929 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT() 4001 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT() 4299 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA() 4439 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process() 4677 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT() 4752 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT() [all …]
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/hal_stm32-3.5.0/stm32cube/stm32wbaxx/drivers/src/ |
D | stm32wbaxx_hal_cryp.c | 344 #define CRYP_SET_PHASE(__HANDLE__, __PHASE__)\ macro 3229 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_DMAInCplt() 3850 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process() 3927 CRYP_SET_PHASE(hcryp, CRYP_PHASE_PAYLOAD); in CRYP_AESGCM_Process() 4105 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_IT() 4181 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESGCM_Process_IT() 4479 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESGCM_Process_DMA() 4623 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process() 4865 CRYP_SET_PHASE(hcryp, CRYP_PHASE_INIT); in CRYP_AESCCM_Process_IT() 4944 CRYP_SET_PHASE(hcryp, CRYP_PHASE_HEADER); in CRYP_AESCCM_Process_IT() [all …]
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