/hal_stm32-3.5.0/stm32cube/stm32c0xx/soc/ |
D | stm32c011xx.h | 982 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1013 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32c031xx.h | 986 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1017 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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/hal_stm32-3.5.0/stm32cube/stm32g0xx/soc/ |
D | stm32g030xx.h | 1035 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1066 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32g070xx.h | 1057 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1088 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32g050xx.h | 1054 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1085 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32g031xx.h | 1078 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1109 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32g041xx.h | 1125 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1156 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32g051xx.h | 1141 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1172 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32g061xx.h | 1188 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1219 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32g071xx.h | 1190 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1221 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32g081xx.h | 1237 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1268 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32g0b0xx.h | 1139 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1170 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32g0c1xx.h | 1404 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1435 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32g0b1xx.h | 1357 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1388 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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/hal_stm32-3.5.0/stm32cube/stm32wlxx/soc/ |
D | stm32wle4xx.h | 1364 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1395 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32wle5xx.h | 1364 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1395 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32wl54xx.h | 1546 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1577 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32wl55xx.h | 1546 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1577 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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D | stm32wl5mxx.h | 1546 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro 1577 #define ADC_TR2_LT2_2 ADC_AWD2TR_LT2_2
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/hal_stm32-3.5.0/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 1455 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro
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D | stm32wba52xx.h | 1934 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro
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D | stm32wba54xx.h | 2049 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro
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D | stm32wba55xx.h | 2049 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro
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/hal_stm32-3.5.0/stm32cube/stm32u5xx/soc/ |
D | stm32u545xx.h | 4310 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro
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D | stm32u535xx.h | 4146 #define ADC_AWD2TR_LT2_2 (0x004UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000004 */ macro
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