/hal_stm32-3.4.0/stm32cube/stm32f0xx/soc/ |
D | stm32f051x8.h | 5866 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 5867 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32f058xx.h | 5835 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 5836 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32f071xb.h | 6419 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 6420 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32f042x6.h | 9641 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 9642 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32f048xx.h | 9605 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 9606 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32f091xc.h | 10873 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 10874 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32f078xx.h | 10186 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 10187 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32f098xx.h | 10840 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 10841 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32f072xb.h | 10216 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 10217 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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/hal_stm32-3.4.0/stm32cube/stm32l0xx/soc/ |
D | stm32l052xx.h | 6392 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 6393 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32l053xx.h | 6551 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 6552 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32l062xx.h | 6529 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 6530 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32l072xx.h | 6688 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 6689 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32l083xx.h | 6984 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 6985 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32l073xx.h | 6847 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 6848 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32l082xx.h | 6825 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 6826 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32l063xx.h | 6686 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 6687 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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/hal_stm32-3.4.0/stm32cube/stm32f3xx/soc/ |
D | stm32f301x8.h | 7653 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 7654 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32f318xx.h | 7640 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 7641 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32f373xc.h | 10827 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 10828 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32f378xx.h | 10725 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 10726 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32f302xc.h | 11566 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 11567 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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/hal_stm32-3.4.0/stm32cube/stm32wbxx/soc/ |
D | stm32wb1mxx.h | 8282 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 8283 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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/hal_stm32-3.4.0/stm32cube/stm32wbxx/soc/Include/ |
D | stm32wb10xx.h | 8110 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 8111 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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D | stm32wb15xx.h | 8282 #define TSC_IOCCR_G6_IO3_Pos (22U) macro 8283 #define TSC_IOCCR_G6_IO3_Msk (0x1UL << TSC_IOCCR_G6_IO3_Pos) /*!< 0x00400000 */
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