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Searched refs:RCC_CCIPR_I2C3SEL_0 (Results 1 – 25 of 57) sorted by relevance

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/hal_stm32-3.4.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc_ex.h328 #define RCC_I2C3CLKSOURCE_SYSCLK RCC_CCIPR_I2C3SEL_0
Dstm32g4xx_ll_rcc.h370 … ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_I2C3SEL_Pos << 16U) | (RCC_CCIPR_I2C3SEL_0 >> RCC_CCIP…
/hal_stm32-3.4.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_rcc.h382 …2C3_CLKSOURCE_SYSCLK (uint32_t)((RCC_CCIPR_I2C3SEL << 4U) | (RCC_CCIPR_I2C3SEL_0 >> 4U)) /*…
Dstm32l0xx_hal_rcc_ex.h359 #define RCC_I2C3CLKSOURCE_SYSCLK RCC_CCIPR_I2C3SEL_0
/hal_stm32-3.4.0/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_rcc.h401 …I2C3_CLKSOURCE_SYSCLK (uint32_t)((RCC_CCIPR_I2C3SEL << 4) | (RCC_CCIPR_I2C3SEL_0 >> 4)) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc_ex.h501 #define RCC_I2C3CLKSOURCE_SYSCLK RCC_CCIPR_I2C3SEL_0
Dstm32l4xx_ll_rcc.h447 … ((RCC_OFFSET_CCIPR << 24U) | (RCC_CCIPR_I2C3SEL_Pos << 16U) | (RCC_CCIPR_I2C3SEL_0 >> RCC_CCIP…
/hal_stm32-3.4.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_rcc.h470 …I2C3_CLKSOURCE_SYSCLK (uint32_t)((RCC_CCIPR_I2C3SEL << 4) | (RCC_CCIPR_I2C3SEL_0 >> 4)) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32l0xx/soc/
Dstm32l081xx.h4165 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
Dstm32l071xx.h4028 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
Dstm32l072xx.h4487 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
Dstm32l083xx.h4775 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
Dstm32l073xx.h4638 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
Dstm32l082xx.h4624 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
/hal_stm32-3.4.0/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h6499 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
Dstm32wle5xx.h6499 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
Dstm32wl54xx.h7376 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
Dstm32wl55xx.h7376 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
Dstm32wl5mxx.h7376 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
/hal_stm32-3.4.0/stm32cube/stm32l4xx/soc/
Dstm32l412xx.h6153 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
Dstm32l422xx.h6378 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
/hal_stm32-3.4.0/stm32cube/stm32g4xx/soc/
Dstm32g431xx.h8060 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
Dstm32g441xx.h8290 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
Dstm32gbk1cb.h8032 #define RCC_CCIPR_I2C3SEL_0 (0x1UL << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro
/hal_stm32-3.4.0/stm32cube/stm32wbxx/soc/
Dstm32wb35xx.h7885 #define RCC_CCIPR_I2C3SEL_0 (0x1U << RCC_CCIPR_I2C3SEL_Pos) /*!< 0x00010000 */ macro

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