/hal_stm32-3.4.0/stm32cube/stm32wlxx/drivers/include/ |
D | stm32wlxx_hal_pwr_ex.h | 278 #define PWR_FLAG_WUF2 (PWR_FLAG_REG_SR1 | PWR_SR1_WUF2_Pos) /*!< Wakeu…
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/hal_stm32-3.4.0/stm32cube/stm32wbxx/drivers/include/ |
D | stm32wbxx_hal_pwr_ex.h | 333 #define PWR_FLAG_WUF2 (PWR_FLAG_REG_SR1 | PWR_SR1_WUF2_Pos) /*!< Wakeup ev…
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/hal_stm32-3.4.0/stm32cube/stm32c0xx/soc/ |
D | stm32c011xx.h | 3569 #define PWR_SR1_WUF2_Pos (1U) macro 3570 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32c031xx.h | 3573 #define PWR_SR1_WUF2_Pos (1U) macro 3574 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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/hal_stm32-3.4.0/stm32cube/stm32g0xx/soc/ |
D | stm32g030xx.h | 3626 #define PWR_SR1_WUF2_Pos (1U) macro 3627 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32g050xx.h | 3645 #define PWR_SR1_WUF2_Pos (1U) macro 3646 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32g070xx.h | 3660 #define PWR_SR1_WUF2_Pos (1U) macro 3661 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32g031xx.h | 3802 #define PWR_SR1_WUF2_Pos (1U) macro 3803 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32g041xx.h | 4038 #define PWR_SR1_WUF2_Pos (1U) macro 4039 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32g051xx.h | 4138 #define PWR_SR1_WUF2_Pos (1U) macro 4139 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32g061xx.h | 4374 #define PWR_SR1_WUF2_Pos (1U) macro 4375 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32g0b0xx.h | 4432 #define PWR_SR1_WUF2_Pos (1U) macro 4433 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32g081xx.h | 4595 #define PWR_SR1_WUF2_Pos (1U) macro 4596 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32g071xx.h | 4359 #define PWR_SR1_WUF2_Pos (1U) macro 4360 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32g0b1xx.h | 5403 #define PWR_SR1_WUF2_Pos (1U) macro 5404 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32g0c1xx.h | 5639 #define PWR_SR1_WUF2_Pos (1U) macro 5640 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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/hal_stm32-3.4.0/stm32cube/stm32wlxx/soc/ |
D | stm32wle4xx.h | 5421 #define PWR_SR1_WUF2_Pos (1U) macro 5422 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32wle5xx.h | 5421 #define PWR_SR1_WUF2_Pos (1U) macro 5422 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32wl54xx.h | 6197 #define PWR_SR1_WUF2_Pos (1U) macro 6198 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32wl55xx.h | 6197 #define PWR_SR1_WUF2_Pos (1U) macro 6198 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32wl5mxx.h | 6197 #define PWR_SR1_WUF2_Pos (1U) macro 6198 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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/hal_stm32-3.4.0/stm32cube/stm32l4xx/soc/ |
D | stm32l412xx.h | 4916 #define PWR_SR1_WUF2_Pos (1U) macro 4917 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32l422xx.h | 5132 #define PWR_SR1_WUF2_Pos (1U) macro 5133 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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/hal_stm32-3.4.0/stm32cube/stm32g4xx/soc/ |
D | stm32g431xx.h | 6564 #define PWR_SR1_WUF2_Pos (1U) macro 6565 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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D | stm32g441xx.h | 6785 #define PWR_SR1_WUF2_Pos (1U) macro 6786 #define PWR_SR1_WUF2_Msk (0x1UL << PWR_SR1_WUF2_Pos) /*!< 0x00000002 */
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