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Searched refs:PWR_PUCRG_PG5_Pos (Results 1 – 20 of 20) sorted by relevance

/hal_stm32-3.4.0/stm32cube/stm32g4xx/soc/
Dstm32g473xx.h7989 #define PWR_PUCRG_PG5_Pos (5U) macro
7990 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32g471xx.h7475 #define PWR_PUCRG_PG5_Pos (5U) macro
7476 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32g483xx.h8210 #define PWR_PUCRG_PG5_Pos (5U) macro
8211 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32g474xx.h11559 #define PWR_PUCRG_PG5_Pos (5U) macro
11560 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32g484xx.h11780 #define PWR_PUCRG_PG5_Pos (5U) macro
11781 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
/hal_stm32-3.4.0/stm32cube/stm32l4xx/soc/
Dstm32l471xx.h10232 #define PWR_PUCRG_PG5_Pos (5U) macro
10233 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32l475xx.h10396 #define PWR_PUCRG_PG5_Pos (5U) macro
10397 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32l486xx.h10635 #define PWR_PUCRG_PG5_Pos (5U) macro
10636 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32l476xx.h10425 #define PWR_PUCRG_PG5_Pos (5U) macro
10426 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32l485xx.h10612 #define PWR_PUCRG_PG5_Pos (5U) macro
10613 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32l4s7xx.h12192 #define PWR_PUCRG_PG5_Pos (5U) macro
12193 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32l4r5xx.h11382 #define PWR_PUCRG_PG5_Pos (5U) macro
11383 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32l4s5xx.h11711 #define PWR_PUCRG_PG5_Pos (5U) macro
11712 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32l4r7xx.h11863 #define PWR_PUCRG_PG5_Pos (5U) macro
11864 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32l4a6xx.h11529 #define PWR_PUCRG_PG5_Pos (5U) macro
11530 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32l496xx.h11207 #define PWR_PUCRG_PG5_Pos (5U) macro
11208 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32l4p5xx.h12164 #define PWR_PUCRG_PG5_Pos (5U) macro
12165 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32l4q5xx.h12657 #define PWR_PUCRG_PG5_Pos (5U) macro
12658 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32l4s9xx.h15311 #define PWR_PUCRG_PG5_Pos (5U) macro
15312 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */
Dstm32l4r9xx.h14982 #define PWR_PUCRG_PG5_Pos (5U) macro
14983 #define PWR_PUCRG_PG5_Msk (0x1UL << PWR_PUCRG_PG5_Pos) /*!< 0x00000020 */