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Searched refs:FDCAN_IR_TEFF_Pos (Results 1 – 25 of 65) sorted by relevance

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/hal_stm32-3.4.0/stm32cube/stm32g0xx/soc/
Dstm32g0b0xx.h2734 #define FDCAN_IR_TEFF_Pos (11U) macro
2735 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g0b1xx.h3575 #define FDCAN_IR_TEFF_Pos (11U) macro
3576 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g0c1xx.h3811 #define FDCAN_IR_TEFF_Pos (11U) macro
3812 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
/hal_stm32-3.4.0/stm32cube/stm32g4xx/soc/
Dstm32g431xx.h4282 #define FDCAN_IR_TEFF_Pos (11U) macro
4283 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g441xx.h4503 #define FDCAN_IR_TEFF_Pos (11U) macro
4504 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32gbk1cb.h4268 #define FDCAN_IR_TEFF_Pos (11U) macro
4269 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g473xx.h4599 #define FDCAN_IR_TEFF_Pos (11U) macro
4600 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g471xx.h4464 #define FDCAN_IR_TEFF_Pos (11U) macro
4465 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g491xx.h4440 #define FDCAN_IR_TEFF_Pos (11U) macro
4441 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g4a1xx.h4661 #define FDCAN_IR_TEFF_Pos (11U) macro
4662 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g483xx.h4820 #define FDCAN_IR_TEFF_Pos (11U) macro
4821 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g474xx.h4732 #define FDCAN_IR_TEFF_Pos (11U) macro
4733 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32g484xx.h4953 #define FDCAN_IR_TEFF_Pos (11U) macro
4954 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
/hal_stm32-3.4.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h5456 #define FDCAN_IR_TEFF_Pos (11U) macro
5457 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800…
Dstm32h562xx.h7171 #define FDCAN_IR_TEFF_Pos (11U) macro
7172 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800…
/hal_stm32-3.4.0/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h6912 #define FDCAN_IR_TEFF_Pos (11U) macro
6913 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
Dstm32l562xx.h7244 #define FDCAN_IR_TEFF_Pos (11U) macro
7245 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800 */
/hal_stm32-3.4.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h7115 #define FDCAN_IR_TEFF_Pos (11U) macro
7116 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800…
Dstm32u545xx.h7515 #define FDCAN_IR_TEFF_Pos (11U) macro
7516 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00000800…
/hal_stm32-3.4.0/stm32cube/stm32h7xx/soc/
Dstm32h7a3xxq.h4180 #define FDCAN_IR_TEFF_Pos (14U) macro
4181 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00004000 */
Dstm32h7a3xx.h4179 #define FDCAN_IR_TEFF_Pos (14U) macro
4180 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00004000 */
Dstm32h7b0xx.h4314 #define FDCAN_IR_TEFF_Pos (14U) macro
4315 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00004000 */
Dstm32h7b0xxq.h4315 #define FDCAN_IR_TEFF_Pos (14U) macro
4316 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00004000 */
Dstm32h7b3xx.h4314 #define FDCAN_IR_TEFF_Pos (14U) macro
4315 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00004000 */
Dstm32h7b3xxq.h4315 #define FDCAN_IR_TEFF_Pos (14U) macro
4316 #define FDCAN_IR_TEFF_Msk (0x1UL << FDCAN_IR_TEFF_Pos) /*!< 0x00004000 */

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