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Searched refs:ADC_AWD_CR1_REGOFFSET (Results 1 – 19 of 19) sorted by relevance

/hal_stm32-3.4.0/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_adc.h145 #define ADC_AWD_CR1_REGOFFSET (0x00000000U) macro
147 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET)
153 #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
545 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_adc.h147 #define ADC_AWD_CR1_REGOFFSET (0x00000000U) macro
149 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET)
155 #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
643 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_adc.h187 #define ADC_AWD_CR1_REGOFFSET (0x00000000UL) macro
196 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD…
207 #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
773 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_adc.h188 #define ADC_AWD_CR1_REGOFFSET (0x00000000UL) macro
197 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD…
207 #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
756 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_adc.h188 #define ADC_AWD_CR1_REGOFFSET (0x00000000UL) macro
197 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD…
208 #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
906 … | ADC_AWD_CR1_REGOFFSET) /*!< ADC analog watchdog number 1 */
/hal_stm32-3.4.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_adc.h322 #define ADC_AWD_CR1_REGOFFSET ((uint32_t)0x00000000U) macro
331 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD…
338 #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
1259 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
7444 #define ADC_AWD_CR1_REGOFFSET ((uint32_t)0x00000000U) macro
7446 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET)
7961 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_adc.h184 #define ADC_AWD_CR1_REGOFFSET 0x00000000U macro
186 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET)
752 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_adc.h240 #define ADC_AWD_CR1_REGOFFSET 0x00000000U macro
242 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET)
856 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_adc.h241 #define ADC_AWD_CR1_REGOFFSET 0x00000000U macro
243 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET)
847 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_adc.h311 #define ADC_AWD_CR1_REGOFFSET (0x00000000UL) macro
320 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD…
330 #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
1408 … | ADC_AWD_CR1_REGOFFSET) /*!< ADC analog watchdog number 1 */
/hal_stm32-3.4.0/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_adc.h311 #define ADC_AWD_CR1_REGOFFSET (0x00000000UL) macro
320 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD…
329 #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
1106 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_adc.h313 #define ADC_AWD_CR1_REGOFFSET (0x00000000UL) macro
322 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD…
332 #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
1502 … | ADC_AWD_CR1_REGOFFSET) /*!< ADC analog watchdog number 1 */
/hal_stm32-3.4.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_adc.h294 #define ADC_AWD_CR1_REGOFFSET (0x00000000UL) macro
303 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD…
312 #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
1058 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_adc.h240 #define ADC_AWD_CR1_REGOFFSET 0x00000000UL macro
242 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET)
869 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_adc.h307 #define ADC_AWD_CR1_REGOFFSET 0x00000000U macro
309 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET)
999 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_adc.h294 #define ADC_AWD_CR1_REGOFFSET (0x00000000UL) macro
303 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD…
312 #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
1246 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_adc.h349 #define ADC_AWD_CR1_REGOFFSET (0x00000000UL) macro
358 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD…
373 #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
1230 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_adc.h307 #define ADC_AWD_CR1_REGOFFSET (0x00000000UL) macro
316 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD…
325 #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
1269 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…
/hal_stm32-3.4.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_adc.h415 #define ADC_AWD_CR1_REGOFFSET (0x00000000UL) macro
424 #define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET | ADC_AWD_CR2_REGOFFSET | ADC_AWD_CR3…
434 #define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
1573 #define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK | ADC_AWD_CR1_REGOFFSET) /*!<…