Home
last modified time | relevance | path

Searched refs:ADC_AWD2TR_LT2_10 (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-3.4.0/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h1043 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1074 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
Dstm32g050xx.h1062 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1093 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
Dstm32g070xx.h1065 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1096 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
Dstm32g031xx.h1086 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1117 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
Dstm32g041xx.h1133 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1164 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
Dstm32g051xx.h1149 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1180 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
Dstm32g061xx.h1196 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1227 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
Dstm32g0b0xx.h1147 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1178 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
Dstm32g081xx.h1245 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1276 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
Dstm32g071xx.h1198 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1229 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
Dstm32g0b1xx.h1365 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1396 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
Dstm32g0c1xx.h1412 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1443 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
/hal_stm32-3.4.0/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h1372 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1403 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
Dstm32wle5xx.h1372 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1403 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
Dstm32wl54xx.h1554 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1585 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
Dstm32wl55xx.h1554 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1585 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
Dstm32wl5mxx.h1554 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
1585 #define ADC_TR2_LT2_10 ADC_AWD2TR_LT2_10
/hal_stm32-3.4.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h4154 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
Dstm32u545xx.h4318 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
Dstm32u575xx.h4557 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
Dstm32u585xx.h4770 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
Dstm32u5a5xx.h4903 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
Dstm32u595xx.h4690 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
Dstm32u599xx.h4978 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro
Dstm32u5a9xx.h5191 #define ADC_AWD2TR_LT2_10 (0x400UL << ADC_AWD2TR_LT2_Pos) /*!< 0x00000400 */ macro