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Searched refs:ADC_AWD1TR_HT1_7 (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-3.4.0/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h994 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1023 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
Dstm32g050xx.h1013 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1042 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
Dstm32g070xx.h1016 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1045 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
Dstm32g031xx.h1037 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1066 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
Dstm32g041xx.h1084 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1113 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
Dstm32g051xx.h1100 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1129 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
Dstm32g061xx.h1147 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1176 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
Dstm32g0b0xx.h1098 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1127 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
Dstm32g081xx.h1196 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1225 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
Dstm32g071xx.h1149 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1178 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
Dstm32g0b1xx.h1316 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1345 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
Dstm32g0c1xx.h1363 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1392 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
/hal_stm32-3.4.0/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h1323 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1352 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
Dstm32wle5xx.h1323 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1352 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
Dstm32wl54xx.h1505 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1534 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
Dstm32wl55xx.h1505 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1534 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
Dstm32wl5mxx.h1505 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
1534 #define ADC_TR1_HT1_7 ADC_AWD1TR_HT1_7
/hal_stm32-3.4.0/stm32cube/stm32u5xx/soc/
Dstm32u535xx.h4134 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
Dstm32u545xx.h4298 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
Dstm32u575xx.h4537 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
Dstm32u585xx.h4750 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
Dstm32u5a5xx.h4883 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
Dstm32u595xx.h4670 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
Dstm32u599xx.h4958 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro
Dstm32u5a9xx.h5171 #define ADC_AWD1TR_HT1_7 (0x080UL << ADC_AWD1TR_HT1_Pos) /*!< 0x00800000 */ macro