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Searched refs:TIM_CR2_OIS6 (Results 1 – 25 of 154) sorted by relevance

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/hal_stm32-2.7.6/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_ll_tim.c1216 MODIFY_REG(TIMx->CR2, TIM_CR2_OIS6, TIM_OCInitStruct->OCIdleState << 10U); in OC6Config()
Dstm32h7xx_hal_tim.c7157 tmpcr2 &= ~TIM_CR2_OIS6; in TIM_OC6_SetConfig()
/hal_stm32-2.7.6/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_ll_tim.c1187 MODIFY_REG(TIMx->CR2, TIM_CR2_OIS6, TIM_OCInitStruct->OCIdleState << 10U); in OC6Config()
Dstm32l5xx_hal_tim.c7148 tmpcr2 &= ~TIM_CR2_OIS6; in TIM_OC6_SetConfig()
/hal_stm32-2.7.6/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_ll_tim.c1152 MODIFY_REG(TIMx->CR2, TIM_CR2_OIS6, TIM_OCInitStruct->OCIdleState << 10U); in OC6Config()
Dstm32wlxx_hal_tim.c7167 tmpcr2 &= ~TIM_CR2_OIS6; in TIM_OC6_SetConfig()
/hal_stm32-2.7.6/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_ll_tim.c1207 MODIFY_REG(TIMx->CR2, TIM_CR2_OIS6, TIM_OCInitStruct->OCIdleState << 10U); in OC6Config()
Dstm32g0xx_hal_tim.c7245 tmpcr2 &= ~TIM_CR2_OIS6; in TIM_OC6_SetConfig()
/hal_stm32-2.7.6/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_ll_tim.c1214 MODIFY_REG(TIMx->CR2, TIM_CR2_OIS6, TIM_OCInitStruct->OCIdleState << 10U); in OC6Config()
Dstm32f7xx_hal_tim.c7152 tmpcr2 &= ~TIM_CR2_OIS6; in TIM_OC6_SetConfig()
/hal_stm32-2.7.6/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_ll_tim.c1187 MODIFY_REG(TIMx->CR2, TIM_CR2_OIS6, TIM_OCInitStruct->OCIdleState << 10U); in OC6Config()
Dstm32l4xx_hal_tim.c7157 tmpcr2 &= ~TIM_CR2_OIS6; in TIM_OC6_SetConfig()
/hal_stm32-2.7.6/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_ll_tim.c1156 MODIFY_REG(TIMx->CR2, TIM_CR2_OIS6, TIM_OCInitStruct->OCIdleState << 10U); in OC6Config()
Dstm32wbxx_hal_tim.c7175 tmpcr2 &= ~TIM_CR2_OIS6; in TIM_OC6_SetConfig()
/hal_stm32-2.7.6/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_tim.c1225 MODIFY_REG(TIMx->CR2, TIM_CR2_OIS6, TIM_OCInitStruct->OCIdleState << 10U); in OC6Config()
Dstm32u5xx_hal_tim.c7685 tmpcr2 &= ~TIM_CR2_OIS6; in TIM_OC6_SetConfig()
/hal_stm32-2.7.6/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_ll_tim.c1230 MODIFY_REG(TIMx->CR2, TIM_CR2_OIS6, TIM_OCInitStruct->OCIdleState << 10U); in OC6Config()
Dstm32mp1xx_hal_tim.c6362 tmpcr2 &= ~TIM_CR2_OIS6; in TIM_OC6_SetConfig()
/hal_stm32-2.7.6/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_ll_tim.c1294 MODIFY_REG(TIMx->CR2, TIM_CR2_OIS6, TIM_OCInitStruct->OCIdleState << 10U); in OC6Config()
Dstm32f3xx_hal_tim.c7399 tmpcr2 &= ~TIM_CR2_OIS6; in TIM_OC6_SetConfig()
/hal_stm32-2.7.6/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_ll_tim.c1213 MODIFY_REG(TIMx->CR2, TIM_CR2_OIS6, TIM_OCInitStruct->OCIdleState << 10U); in OC6Config()
Dstm32g4xx_hal_tim.c7337 tmpcr2 &= ~TIM_CR2_OIS6; in TIM_OC6_SetConfig()
/hal_stm32-2.7.6/stm32cube/stm32g0xx/soc/
Dstm32g070xx.h5922 #define TIM_CR2_OIS6 TIM_CR2_OIS6_Msk /*!<Output Idle stat… macro
Dstm32g031xx.h5986 #define TIM_CR2_OIS6 TIM_CR2_OIS6_Msk /*!<Output Idle stat… macro
Dstm32g030xx.h5722 #define TIM_CR2_OIS6 TIM_CR2_OIS6_Msk /*!<Output Idle stat… macro

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