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Searched refs:ECCR (Results 1 – 25 of 114) sorted by relevance

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/hal_stm32-2.7.6/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_flash.h663 …T__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE);…
675 …RUPT__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE);…
688 …T__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE);…
703 …_) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE);…
715 …PT__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE);…
728 …_) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE);…
752 … (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \
774 … (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \
795 … (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \
817 … do { if(((__FLAG__) & FLASH_FLAG_ECCR_ERRORS) != 0U) { SET_BIT(FLASH->ECCR, ((__FLAG__) & FLAS…
[all …]
/hal_stm32-2.7.6/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_flash.h739 { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); } \
745 { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); } \
752 { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); } \
770 … { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); } \
776 … { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); } \
784 { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE); }\
811 … (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \
817 … (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \
822 … (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \
846 … { SET_BIT(FLASH->ECCR, ((__FLAG__) & FLASH_FLAG_ECCR_ERRORS)); }\
[all …]
/hal_stm32-2.7.6/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_flash.h694 …_) & (FLASH_FLAG_ECCR1_ID << FLASH_FLAG_REG_POS)) != 0U) { SET_BIT(FLASH->ECCR, (1uL << ((__INTERR…
699 …_) & (FLASH_FLAG_ECCR1_ID << FLASH_FLAG_REG_POS)) != 0U) { SET_BIT(FLASH->ECCR, (1uL << ((__INTERR…
718 … & (FLASH_FLAG_ECCR1_ID << FLASH_FLAG_REG_POS)) != 0U) { CLEAR_BIT(FLASH->ECCR, (1uL << ((__INTERR…
723 … & (FLASH_FLAG_ECCR1_ID << FLASH_FLAG_REG_POS)) != 0U) { CLEAR_BIT(FLASH->ECCR, (1uL << ((__INTERR…
759 … (READ_BIT(FLASH->ECCR, (1uL << ((__FLAG__) & 0x1Fu))) != 0x00u) : \
764 … (READ_BIT(FLASH->ECCR, (1uL << ((__FLAG__) & 0x1Fu))) != 0x00u))
793 …(__FLAG__) & (FLASH_FLAG_ECCR1_ID << FLASH_FLAG_REG_POS)) != 0U) { FLASH->ECCR = (1uL << ((__FLAG_…
798 …(__FLAG__) & (FLASH_FLAG_ECCR1_ID << FLASH_FLAG_REG_POS)) != 0U) { FLASH->ECCR = (1uL << ((__FLAG_…
/hal_stm32-2.7.6/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_hal_flash.h713 …T__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCCIE)…
717 …T__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCCIE)…
733 …__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCCIE)…
737 …__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCCIE)…
767 … (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \
773 … (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \
799 … do { if(((__FLAG__) & (FLASH_FLAG_ECCR_ERRORS)) != 0U) { SET_BIT(FLASH->ECCR, ((__FLAG__) & (FLA…
804 … do { if(((__FLAG__) & (FLASH_FLAG_ECCR_ERRORS)) != 0U) { SET_BIT(FLASH->ECCR, ((__FLAG__) & (FLA…
/hal_stm32-2.7.6/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_flash.h723 …T__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE);…
737 …__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE);…
765 … (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \
792 … do { if(((__FLAG__) & FLASH_FLAG_ECCR_ERRORS) != 0U) { SET_BIT(FLASH->ECCR, ((__FLAG__) & FLAS…
/hal_stm32-2.7.6/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_flash.h712 …T__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCCIE)…
726 …__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCCIE)…
754 … (READ_BIT(FLASH->ECCR, (__FLAG__)) == (__FLAG__)) : \
778 … do { if(((__FLAG__) & (FLASH_FLAG_ECCR_ERRORS)) != 0U) { SET_BIT(FLASH->ECCR, ((__FLAG__) & (FLA…
Dstm32wbxx_hal_flash_ex.h77 #define __HAL_FLASH_ECC_CPUID() READ_BIT(FLASH->ECCR, FLASH_ECCR_CPUID)
/hal_stm32-2.7.6/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_flash.h701 …T__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { SET_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE);…
715 …__) do { if(((__INTERRUPT__) & FLASH_IT_ECCC) != 0U) { CLEAR_BIT(FLASH->ECCR, FLASH_ECCR_ECCIE);…
741 (READ_BIT(FLASH->ECCR, (__FLAG__)) != 0U) : \
764 … do { if(((__FLAG__) & FLASH_FLAG_ECCR_ERRORS) != 0U) { SET_BIT(FLASH->ECCR, ((__FLAG__) & FLAS…
/hal_stm32-2.7.6/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_fmc.c772 *ECCval = (uint32_t)Device->ECCR; in FMC_NAND_GetECC()
/hal_stm32-2.7.6/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_ll_fmc.c772 *ECCval = (uint32_t)Device->ECCR; in FMC_NAND_GetECC()
/hal_stm32-2.7.6/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_ll_fmc.c791 *ECCval = (uint32_t)Device->ECCR; in FMC_NAND_GetECC()
/hal_stm32-2.7.6/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_ll_fmc.c834 *ECCval = (uint32_t)Device->ECCR; in FMC_NAND_GetECC()
/hal_stm32-2.7.6/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_ll_fmc.c731 *ECCval = (uint32_t)Device->ECCR; in FMC_NAND_GetECC()
/hal_stm32-2.7.6/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_ll_fmc.c683 *ECCval = (uint32_t)Device->ECCR; in FMC_NAND_GetECC()
/hal_stm32-2.7.6/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_ll_fmc.c721 *ECCval = (uint32_t)Device->ECCR; in FMC_NAND_GetECC()
/hal_stm32-2.7.6/stm32cube/stm32g4xx/soc/
Dstm32g473xx.h457 …__IO uint32_t ECCR; /*!< FLASH ECC register, Address offset: 0x1… member
519 …__IO uint32_t ECCR; /*!< NAND Flash ECC result registers, Address offset: … member
Dstm32g483xx.h458 …__IO uint32_t ECCR; /*!< FLASH ECC register, Address offset: 0x1… member
520 …__IO uint32_t ECCR; /*!< NAND Flash ECC result registers, Address offset: … member
Dstm32g484xx.h466 …__IO uint32_t ECCR; /*!< FLASH ECC register, Address offset: 0x1… member
528 …__IO uint32_t ECCR; /*!< NAND Flash ECC result registers, Address offset: … member
/hal_stm32-2.7.6/stm32cube/stm32g0xx/soc/
Dstm32g070xx.h249 …__IO uint32_t ECCR; /*!< FLASH ECC register, Address offset… member
Dstm32g031xx.h250 …__IO uint32_t ECCR; /*!< FLASH ECC register, Address offset… member
Dstm32g030xx.h245 …__IO uint32_t ECCR; /*!< FLASH ECC register, Address offset… member
Dstm32g050xx.h248 …__IO uint32_t ECCR; /*!< FLASH ECC register, Address offset… member
Dstm32g051xx.h290 …__IO uint32_t ECCR; /*!< FLASH ECC register, Address offset… member
Dstm32g041xx.h251 …__IO uint32_t ECCR; /*!< FLASH ECC register, Address offset… member
/hal_stm32-2.7.6/stm32cube/stm32l4xx/soc/
Dstm32l471xx.h479 …__IO uint32_t ECCR; /*!< FLASH ECC register, Address offset: 0x1… member
523 …__IO uint32_t ECCR; /*!< NAND Flash ECC result registers, Address offset: … member

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