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Searched refs:DMA2D_CR_TEIE (Results 1 – 25 of 57) sorted by relevance

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/hal_stm32-2.7.6/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_dma2d.h365 #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
1721 SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); in LL_DMA2D_EnableIT_TE()
1787 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); in LL_DMA2D_DisableIT_TE()
1853 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_TE()
Dstm32f4xx_hal_dma2d.h264 #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
/hal_stm32-2.7.6/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_dma2d.h346 #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
1974 SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); in LL_DMA2D_EnableIT_TE()
2040 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); in LL_DMA2D_DisableIT_TE()
2106 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_TE()
Dstm32l4xx_hal_dma2d.h320 #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
/hal_stm32-2.7.6/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_dma2d.h393 #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
1937 SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); in LL_DMA2D_EnableIT_TE()
2003 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); in LL_DMA2D_DisableIT_TE()
2069 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_TE()
Dstm32f7xx_hal_dma2d.h300 #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
/hal_stm32-2.7.6/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma2d.h398 #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
2006 SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); in LL_DMA2D_EnableIT_TE()
2072 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); in LL_DMA2D_DisableIT_TE()
2138 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_TE()
Dstm32u5xx_hal_dma2d.h314 #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
/hal_stm32-2.7.6/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_dma2d.h405 #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
2051 SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); in LL_DMA2D_EnableIT_TE()
2117 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); in LL_DMA2D_DisableIT_TE()
2183 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_TE()
Dstm32h7xx_hal_dma2d.h327 #define DMA2D_IT_TE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
/hal_stm32-2.7.6/stm32cube/stm32f4xx/soc/
Dstm32f437xx.h6496 #define DMA2D_CR_TEIE DMA2D_CR_TEIE_Msk /*!< Transfer Error … macro
Dstm32f427xx.h6304 #define DMA2D_CR_TEIE DMA2D_CR_TEIE_Msk /*!< Transfer Error … macro
Dstm32f429xx.h6363 #define DMA2D_CR_TEIE DMA2D_CR_TEIE_Msk /*!< Transfer Error … macro
Dstm32f439xx.h6550 #define DMA2D_CR_TEIE DMA2D_CR_TEIE_Msk /*!< Transfer Error … macro
/hal_stm32-2.7.6/stm32cube/stm32f7xx/soc/
Dstm32f746xx.h6441 #define DMA2D_CR_TEIE DMA2D_CR_TEIE_Msk /*!< Transfer Error … macro
Dstm32f756xx.h6629 #define DMA2D_CR_TEIE DMA2D_CR_TEIE_Msk /*!< Transfer Error … macro
Dstm32f750xx.h6629 #define DMA2D_CR_TEIE DMA2D_CR_TEIE_Msk /*!< Transfer Error … macro
Dstm32f745xx.h6386 #define DMA2D_CR_TEIE DMA2D_CR_TEIE_Msk /*!< Transfer Error … macro
Dstm32f765xx.h6846 #define DMA2D_CR_TEIE DMA2D_CR_TEIE_Msk /*!< Transfer Error … macro
Dstm32f777xx.h7128 #define DMA2D_CR_TEIE DMA2D_CR_TEIE_Msk /*!< Transfer Error … macro
Dstm32f767xx.h6940 #define DMA2D_CR_TEIE DMA2D_CR_TEIE_Msk /*!< Transfer Error … macro
/hal_stm32-2.7.6/stm32cube/stm32l4xx/soc/
Dstm32l4s7xx.h7977 #define DMA2D_CR_TEIE DMA2D_CR_TEIE_Msk /*!< Transfer Error … macro
Dstm32l496xx.h7508 #define DMA2D_CR_TEIE DMA2D_CR_TEIE_Msk /*!< Transfer Error … macro
Dstm32l4a6xx.h7753 #define DMA2D_CR_TEIE DMA2D_CR_TEIE_Msk /*!< Transfer Error … macro
Dstm32l4s5xx.h7891 #define DMA2D_CR_TEIE DMA2D_CR_TEIE_Msk /*!< Transfer Error … macro

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