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Searched refs:CFGR1 (Results 1 – 25 of 227) sorted by relevance

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/hal_stm32-2.7.6/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal.h569 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE))
575 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE); \
576 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE_0; \
583 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE); \
584 … SYSCFG->CFGR1 |= (SYSCFG_CFGR1_MEM_MODE_0 | SYSCFG_CFGR1_MEM_MODE_1); \
589 #define __HAL_SYSCFG_FMC_BANK() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE); \
590 SYSCFG->CFGR1 |= (SYSCFG_CFGR1_MEM_MODE_2); \
603 #define __HAL_REMAPENCODER_NONE() (SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_ENCODER_MODE))
609 #define __HAL_REMAPENCODER_TIM2() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_ENCODER_MODE); \
610 SYSCFG->CFGR1 |= SYSCFG_CFGR1_ENCODER_MODE_0; \
[all …]
Dstm32f3xx_ll_system.h506 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, Memory); in LL_SYSCFG_SetRemapMemory()
522 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)); in LL_SYSCFG_GetRemapMemory()
607 MODIFY_REG(SYSCFG->CFGR1, (Remap & 0x00FF0000U) >> 8U, (Remap & 0x0000FF00U)); in LL_SYSCFG_SetRemapDMA_DAC()
629 MODIFY_REG(SYSCFG->CFGR1, (Remap & 0x00FF0000U) >> 8U, (Remap & 0x0000FF00U)); in LL_SYSCFG_SetRemapDMA_TIM()
650 MODIFY_REG(SYSCFG->CFGR1, (Remap & 0xFF00FF00U) >> 8U, (Remap & 0x00FF00FFU)); in LL_SYSCFG_SetRemapInput_TIM()
741 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_USB_IT_RMP); in LL_SYSCFG_EnableRemapIT_USB()
751 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_USB_IT_RMP); in LL_SYSCFG_DisableRemapIT_USB()
763 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_VBAT); in LL_SYSCFG_EnableVBATMonitoring()
773 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_VBAT); in LL_SYSCFG_DisableVBATMonitoring()
800 SET_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_EnableFastModePlus()
[all …]
/hal_stm32-2.7.6/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_system.h460 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS); in LL_SYSCFG_EnableFirewall()
470 return !(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS) == SYSCFG_CFGR1_FWDIS); in LL_SYSCFG_IsEnabledFirewall()
489 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_EnableAnalogBooster()
508 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_DisableAnalogBooster()
530 SET_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_EnableFastModePlus()
552 CLEAR_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_DisableFastModePlus()
562 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0); in LL_SYSCFG_EnableIT_FPU_IOC()
572 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); in LL_SYSCFG_EnableIT_FPU_DZC()
582 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2); in LL_SYSCFG_EnableIT_FPU_UFC()
592 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3); in LL_SYSCFG_EnableIT_FPU_OFC()
[all …]
/hal_stm32-2.7.6/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_system.h432 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_EnableAnalogBooster()
451 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_DisableAnalogBooster()
473 SET_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_EnableFastModePlus()
495 CLEAR_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_DisableFastModePlus()
505 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0); in LL_SYSCFG_EnableIT_FPU_IOC()
515 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); in LL_SYSCFG_EnableIT_FPU_DZC()
525 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2); in LL_SYSCFG_EnableIT_FPU_UFC()
535 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3); in LL_SYSCFG_EnableIT_FPU_OFC()
545 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_4); in LL_SYSCFG_EnableIT_FPU_IDC()
555 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_5); in LL_SYSCFG_EnableIT_FPU_IXC()
[all …]
/hal_stm32-2.7.6/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_system.h505 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_EnableAnalogBooster()
524 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_DisableAnalogBooster()
537 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_ANASWVDD); in LL_SYSCFG_EnableAnalogGpioSwitch()
549 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_ANASWVDD); in LL_SYSCFG_DisableAnalogGpioSwitch()
568 SET_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_EnableFastModePlus()
586 CLEAR_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_DisableFastModePlus()
596 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_0); in LL_SYSCFG_EnableIT_FPU_IOC()
606 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_1); in LL_SYSCFG_EnableIT_FPU_DZC()
616 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_2); in LL_SYSCFG_EnableIT_FPU_UFC()
626 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FPU_IE_3); in LL_SYSCFG_EnableIT_FPU_OFC()
[all …]
Dstm32wbxx_ll_adc.h2791 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution); in LL_ADC_SetResolution()
2812 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
2836 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
2855 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
2919 MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF), LowPowerMode); in LL_ADC_SetLowPowerMode()
2978 return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF))); in LL_ADC_GetLowPowerMode()
3402 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
3443 __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
3485 …return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ?… in LL_ADC_REG_IsTriggerSourceSWStart()
3509 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
[all …]
/hal_stm32-2.7.6/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_adc.h1565 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution); in LL_ADC_SetResolution()
1582 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
1602 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
1617 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
1672 MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF), LowPowerMode); in LL_ADC_SetLowPowerMode()
1722 return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF))); in LL_ADC_GetLowPowerMode()
1836 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
1866 uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
1893 return (READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)); in LL_ADC_REG_IsTriggerSourceSWStart()
1913 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
[all …]
Dstm32f0xx_hal.h352 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() (SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE))
358 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE); \
359 SYSCFG->CFGR1 |= SYSCFG_CFGR1_MEM_MODE_0; \
366 #define __HAL_SYSCFG_REMAPMEMORY_SRAM() do {SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_MEM_MODE); \
367 … SYSCFG->CFGR1 |= (SYSCFG_CFGR1_MEM_MODE_0 | SYSCFG_CFGR1_MEM_MODE_1); \
382 … SYSCFG->CFGR1 |= (__PIN_REMAP__); \
385 … SYSCFG->CFGR1 &= ~(__PIN_REMAP__); \
397 … SET_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
401 … CLEAR_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
486 … SYSCFG->CFGR1 &= ~(SYSCFG_CFGR1_IRDA_ENV_SEL); \
[all …]
Dstm32f0xx_ll_system.h351 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, Memory); in LL_SYSCFG_SetRemapMemory()
364 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)); in LL_SYSCFG_GetRemapMemory()
379 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_MOD, Source); in LL_SYSCFG_SetIRModEnvelopeSignal()
392 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_MOD)); in LL_SYSCFG_GetIRModEnvelopeSignal()
418 MODIFY_REG(SYSCFG->CFGR1, (Remap & 0x00FF00FFU) << 8U, (Remap & 0xFF00FF00U)); in LL_SYSCFG_SetRemapDMA_USART()
433 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_SPI2_DMA_RMP, Remap); in LL_SYSCFG_SetRemapDMA_SPI()
448 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_I2C1_DMA_RMP, Remap); in LL_SYSCFG_SetRemapDMA_I2C()
463 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_ADC_DMA_RMP, Remap); in LL_SYSCFG_SetRemapDMA_ADC()
496 MODIFY_REG(SYSCFG->CFGR1, (Remap & 0x00FF00FFU) << 8U, (Remap & 0xFF00FF00U)); in LL_SYSCFG_SetRemapDMA_TIM()
509 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_PA11_PA12_RMP); in LL_SYSCFG_EnablePinRemap()
[all …]
/hal_stm32-2.7.6/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_dts.c174 CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_Q_MEAS_OPT); in HAL_DTS_Init()
186 SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_Q_MEAS_OPT); in HAL_DTS_Init()
192 SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_REFCLK_SEL); in HAL_DTS_Init()
196 CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_REFCLK_SEL); in HAL_DTS_Init()
199 …MODIFY_REG(hdts->Instance->CFGR1, DTS_CFGR1_HSREF_CLK_DIV, (hdts->Init.Divider << DTS_CFGR1_HSREF_… in HAL_DTS_Init()
200 MODIFY_REG(hdts->Instance->CFGR1, DTS_CFGR1_TS1_SMP_TIME, hdts->Init.SamplingTime); in HAL_DTS_Init()
201 MODIFY_REG(hdts->Instance->CFGR1, DTS_CFGR1_TS1_INTRIG_SEL, hdts->Init.TriggerInput); in HAL_DTS_Init()
230 CLEAR_REG(hdts->Instance->CFGR1); in HAL_DTS_DeInit()
338 SET_BIT(hdts->Instance->CFGR1, DTS_CFGR1_TS1_START); in HAL_DTS_Start()
373 CLEAR_BIT(hdts->Instance->CFGR1, DTS_CFGR1_TS1_START); in HAL_DTS_Stop()
[all …]
/hal_stm32-2.7.6/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_adc.h1954 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution); in LL_ADC_SetResolution()
1971 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
1991 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
2006 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
2061 MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF), LowPowerMode); in LL_ADC_SetLowPowerMode()
2111 return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF))); in LL_ADC_GetLowPowerMode()
2228 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
2261 uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
2288 return (READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)); in LL_ADC_REG_IsTriggerSourceSWStart()
2308 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
[all …]
Dstm32l0xx_ll_system.h286 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, Memory); in LL_SYSCFG_SetRemapMemory()
299 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)); in LL_SYSCFG_GetRemapMemory()
313 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_UFB, Bank); in LL_SYSCFG_SetFlashBankMode()
325 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_UFB)); in LL_SYSCFG_GetFlashBankMode()
343 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOT_MODE)); in LL_SYSCFG_GetBootMode()
/hal_stm32-2.7.6/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_adc.h1956 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution); in LL_ADC_SetResolution()
1973 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
1993 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
2008 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
2066 MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF), LowPowerMode); in LL_ADC_SetLowPowerMode()
2119 return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF))); in LL_ADC_GetLowPowerMode()
2291 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
2320 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
2347 …return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ?… in LL_ADC_REG_IsTriggerSourceSWStart()
2367 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
[all …]
/hal_stm32-2.7.6/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_adc.h2000 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution); in LL_ADC_SetResolution()
2017 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
2037 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
2052 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
2110 MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF), LowPowerMode); in LL_ADC_SetLowPowerMode()
2163 return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF))); in LL_ADC_GetLowPowerMode()
2338 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource); in LL_ADC_REG_SetTriggerSource()
2370 __IO uint32_t trigger_source = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN); in LL_ADC_REG_GetTriggerSource()
2397 …return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ?… in LL_ADC_REG_IsTriggerSourceSWStart()
2417 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge); in LL_ADC_REG_SetTriggerEdge()
[all …]
Dstm32g0xx_hal.h516 #define __HAL_SYSCFG_REMAPMEMORY_FLASH() CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)
520 #define __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH() MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, SYS…
525 …MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, (SYSCFG_CFGR1_MEM_MODE_1|SYSCFG_CFGR1_MEM_MODE_0))
532 #define __HAL_SYSCFG_GET_BOOT_MODE() READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)
575 … SET_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
579 … CLEAR_BIT(SYSCFG->CFGR1, (__FASTMODEPLUS__));\
605 … CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_MOD);\
606 SET_BIT(SYSCFG->CFGR1, (__SOURCE__));\
609 #define __HAL_SYSCFG_GET_IRDA_ENV_SELECTION() ((SYSCFG->CFGR1) & 0x000000C0U)
615 … CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_POL);\
[all …]
Dstm32g0xx_ll_system.h300 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, Memory); in LL_SYSCFG_SetRemapMemory()
313 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE)); in LL_SYSCFG_GetRemapMemory()
327 SET_BIT(SYSCFG->CFGR1, PinRemap); in LL_SYSCFG_EnablePinRemap()
341 CLEAR_BIT(SYSCFG->CFGR1, PinRemap); in LL_SYSCFG_DisablePinRemap()
356 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_MOD, Source); in LL_SYSCFG_SetIRModEnvelopeSignal()
369 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_MOD)); in LL_SYSCFG_GetIRModEnvelopeSignal()
382 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_POL, Polarity); in LL_SYSCFG_SetIRPolarity()
394 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_IR_POL)); in LL_SYSCFG_GetIRPolarity()
415 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_EnableAnalogBooster()
434 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_DisableAnalogBooster()
[all …]
/hal_stm32-2.7.6/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_adc.h3395 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution); in LL_ADC_SetResolution()
3399 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, __LL_ADC_RESOLUTION_ADC1_TO_ADC4(Resolution)); in LL_ADC_SetResolution()
3423 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
3428 temp_Resolution = (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES)); in LL_ADC_GetResolution()
3457 MODIFY_REG(ADCx->CFGR1, ADC4_CFGR1_ALIGN, DataAlignment); in LL_ADC_SetDataAlignment()
3472 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC4_CFGR1_ALIGN)); in LL_ADC_GetDataAlignment()
3530 MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_AUTDLY, LowPowerMode); in LL_ADC_SetLowPowerMode()
3534 MODIFY_REG(ADCx->CFGR1, ADC4_CFGR1_WAIT, LowPowerMode); in LL_ADC_SetLowPowerMode()
3589 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_AUTDLY)); in LL_ADC_GetLowPowerMode()
3593 return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC4_CFGR1_WAIT)); in LL_ADC_GetLowPowerMode()
[all …]
/hal_stm32-2.7.6/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_adc.c527 CLEAR_BIT(pADCx->CFGR1, ADC_CFGR1_AWD1CH | ADC_CFGR1_JAUTO | ADC_CFGR1_JAWD1EN | in LL_ADC_DeInit()
656 CLEAR_BIT(pADCx->CFGR1, in LL_ADC_DeInit()
779 MODIFY_REG(pADCx->CFGR1, in LL_ADC_Init()
785 MODIFY_REG(pADCx->CFGR1, in LL_ADC_Init()
913 MODIFY_REG(pADCx->CFGR1, in LL_ADC_REG_Init()
931 MODIFY_REG(pADCx->CFGR1, in LL_ADC_REG_Init()
954 MODIFY_REG(pADCx->CFGR1, in LL_ADC_REG_Init()
972 MODIFY_REG(pADCx->CFGR1, in LL_ADC_REG_Init()
1102 MODIFY_REG(pADCx->CFGR1, in LL_ADC_INJ_Init()
1109 MODIFY_REG(pADCx->CFGR1, in LL_ADC_INJ_Init()
Dstm32u5xx_hal_adc.c609 MODIFY_REG(hadc->Instance->CFGR1, in HAL_ADC_Init()
699 MODIFY_REG(hadc->Instance->CFGR1, ADC_CFGR_FIELDS_1, tmpCFGR1); in HAL_ADC_Init()
713 MODIFY_REG(hadc->Instance->CFGR1, in HAL_ADC_Init()
754 MODIFY_REG(hadc->Instance->CFGR1, ADC4_CFGR_FIELDS_2, tmpCFGR1); in HAL_ADC_Init()
915 …if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWD1CH | ADC_CFGR1_AWD1EN | ADC_CFGR1_AWD1SGL | ADC_CFGR1… in HAL_ADC_Init()
1030 CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_AWD1CH | ADC_CFGR1_JAUTO | ADC_CFGR1_JAWD1EN | in HAL_ADC_DeInit()
1129 …hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWD1CH | ADC_CFGR1_AWD1EN | ADC_CFGR1_AWD1SGL | ADC_CFGR1_… in HAL_ADC_DeInit()
1576 if (READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_JAUTO) != 0UL) in HAL_ADC_Start()
1685 if (READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMNGT_0) != 0UL) in HAL_ADC_PollForConversion()
1697 if ((hadc->Instance->CFGR1 & ADC4_CFGR1_DMAEN) != 0UL) in HAL_ADC_PollForConversion()
[all …]
/hal_stm32-2.7.6/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_hal_adc.c508 hadc->Instance->CFGR1 &= ~( ADC_CFGR1_RES); in HAL_ADC_Init()
509 hadc->Instance->CFGR1 |= hadc->Init.Resolution; in HAL_ADC_Init()
534 hadc->Instance->CFGR1 &= ~(ADC_CFGR1_ALIGN | in HAL_ADC_Init()
545 hadc->Instance->CFGR1 |= (hadc->Init.DataAlign | in HAL_ADC_Init()
560 hadc->Instance->CFGR1 |= hadc->Init.ExternalTrigConv | in HAL_ADC_Init()
570 hadc->Instance->CFGR1 |= (ADC_CFGR1_DISCEN); in HAL_ADC_Init()
708 hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | \ in HAL_ADC_DeInit()
1174 if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN)) in HAL_ADC_PollForConversion()
1514 hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN; in HAL_ADC_Start_DMA()
1607 CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN); in HAL_ADC_Stop_DMA()
[all …]
/hal_stm32-2.7.6/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_hal_adc.c499 MODIFY_REG(hadc->Instance->CFGR1, in HAL_ADC_Init()
522 hadc->Instance->CFGR1 &= ~( ADC_CFGR1_DISCEN | in HAL_ADC_Init()
575 hadc->Instance->CFGR1 |= tmpCFGR1; in HAL_ADC_Init()
598 …if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_RE… in HAL_ADC_Init()
703 …hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_DIS… in HAL_ADC_DeInit()
1168 if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN)) in HAL_ADC_PollForConversion()
1545 hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN; in HAL_ADC_Start_DMA()
1590 hadc->Instance->CFGR1 &= ~ADC_CFGR1_DMAEN; in HAL_ADC_Stop_DMA()
1773 HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) in HAL_ADC_IRQHandler()
2069 hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL | in HAL_ADC_AnalogWDGConfig()
[all …]
/hal_stm32-2.7.6/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_hal.c653 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in HAL_SYSCFG_EnableIOAnalogSwitchBooster()
662 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in HAL_SYSCFG_DisableIOAnalogSwitchBooster()
677 SET_BIT(SYSCFG->CFGR1, PinRemap); in HAL_SYSCFG_EnableRemap()
692 CLEAR_BIT(SYSCFG->CFGR1, PinRemap); in HAL_SYSCFG_DisableRemap()
739 …MODIFY_REG(SYSCFG->CFGR1, (SYSCFG_CFGR1_UCPD1_STROBE | SYSCFG_CFGR1_UCPD2_STROBE), ConfigDeadBatte… in HAL_SYSCFG_StrobeDBattpinsConfig()
/hal_stm32-2.7.6/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_system.h317 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_ANASWVDD); in LL_SYSCFG_EnableAnalogSwitchVdd()
331 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_ANASWVDD); in LL_SYSCFG_DisableAnalogSwitchVdd()
350 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_EnableAnalogBooster()
369 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in LL_SYSCFG_DisableAnalogBooster()
389 SET_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_EnableFastModePlus()
409 CLEAR_BIT(SYSCFG->CFGR1, ConfigFastModePlus); in LL_SYSCFG_DisableFastModePlus()
/hal_stm32-2.7.6/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal.c710 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in HAL_SYSCFG_EnableIOSwitchBooster()
720 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in HAL_SYSCFG_DisableIOSwitchBooster()
730 SET_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_ANASWVDD); in HAL_SYSCFG_EnableIOSwitchVDD()
740 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_ANASWVDD); in HAL_SYSCFG_DisableIOSwitchVDD()
/hal_stm32-2.7.6/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal.c675 MODIFY_REG(SYSCFG->CFGR1, (SYSCFG_CFGR1_BOOSTEN | SYSCFG_CFGR1_ANASWVDD), SYSCFG_CFGR1_BOOSTEN); in HAL_SYSCFG_EnableIOAnalogBooster()
685 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOSTEN); in HAL_SYSCFG_DisableIOAnalogBooster()
695 MODIFY_REG(SYSCFG->CFGR1, (SYSCFG_CFGR1_BOOSTEN | SYSCFG_CFGR1_ANASWVDD), SYSCFG_CFGR1_ANASWVDD); in HAL_SYSCFG_EnableIOAnalogSwitchVdd()
705 CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_ANASWVDD); in HAL_SYSCFG_DisableIOAnalogSwitchVdd()

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