2791   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution);  in LL_ADC_SetResolution()
2812   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES));  in LL_ADC_GetResolution()
2836   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment);  in LL_ADC_SetDataAlignment()
2855   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN));  in LL_ADC_GetDataAlignment()
2919   MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF), LowPowerMode);  in LL_ADC_SetLowPowerMode()
2978   return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT | ADC_CFGR1_AUTOFF)));  in LL_ADC_GetLowPowerMode()
3402   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL, TriggerSource);  in LL_ADC_REG_SetTriggerSource()
3443   __IO uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL | ADC_CFGR1_EXTEN);  in LL_ADC_REG_GetTriggerSource()
3485 …return ((READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN)) ?…  in LL_ADC_REG_IsTriggerSourceSWStart()
3509   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge);  in LL_ADC_REG_SetTriggerEdge()
3528   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN));  in LL_ADC_REG_GetTriggerEdge()
3563   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_CHSELRMOD, Configurability);  in LL_ADC_REG_SetSequencerConfigurable()
3589   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_CHSELRMOD));  in LL_ADC_REG_GetSequencerConfigurable()
3779   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_SCANDIR, ScanDirection);  in LL_ADC_REG_SetSequencerScanDirection()
3794   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_SCANDIR));  in LL_ADC_REG_GetSequencerScanDirection()
3830   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_DISCEN, SeqDiscont);  in LL_ADC_REG_SetSequencerDiscont()
3859   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_DISCEN));  in LL_ADC_REG_GetSequencerDiscont()
4463   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_CONT, Continuous);  in LL_ADC_REG_SetContinuousMode()
4484   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_CONT));  in LL_ADC_REG_GetContinuousMode()
4526   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG, DMATransfer);  in LL_ADC_REG_SetDMATransfer()
4563   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG));  in LL_ADC_REG_GetDMATransfer()
4593   MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_OVRMOD, Overrun);  in LL_ADC_REG_SetOverrun()
4611   return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_OVRMOD));  in LL_ADC_REG_GetOverrun()
5878   MODIFY_REG(ADCx->CFGR1,  in LL_ADC_SetAnalogWDMonitChannels()
6025 …uint32_t AnalogWDMonitChannels = (READ_BIT(ADCx->CFGR1, LL_ADC_AWD1) & LL_ADC_AWD1 & ADC_AWD_CR_AL…  in LL_ADC_GetAnalogWDMonitChannels()