Home
last modified time | relevance | path

Searched refs:ADC_SMPR_SMP_0 (Results 1 – 25 of 38) sorted by relevance

12

/hal_stm32-2.7.6/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_hal_adc.h384 #define ADC_SAMPLETIME_7CYCLES_5 ((uint32_t) ADC_SMPR_SMP_0) /*!< Sampling t…
386 #define ADC_SAMPLETIME_28CYCLES_5 ((uint32_t)(ADC_SMPR_SMP_1 | ADC_SMPR_SMP_0)) /*!< Sampling t…
388 #define ADC_SAMPLETIME_55CYCLES_5 ((uint32_t)(ADC_SMPR_SMP_2 | ADC_SMPR_SMP_0)) /*!< Sampling t…
Dstm32f0xx_ll_adc.h532 #define LL_ADC_SAMPLINGTIME_7CYCLES_5 (ADC_SMPR_SMP_0) /*…
534 #define LL_ADC_SAMPLINGTIME_28CYCLES_5 (ADC_SMPR_SMP_1 | ADC_SMPR_SMP_0) /*…
536 #define LL_ADC_SAMPLINGTIME_55CYCLES_5 (ADC_SMPR_SMP_2 | ADC_SMPR_SMP_0) /*…
538 #define LL_ADC_SAMPLINGTIME_239CYCLES_5 (ADC_SMPR_SMP_2 | ADC_SMPR_SMP_1 | ADC_SMPR_SMP_0) /*…
/hal_stm32-2.7.6/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_adc.h630 #define LL_ADC_SAMPLINGTIME_3CYCLES_5 (ADC_SMPR_SMP_0) /*…
632 #define LL_ADC_SAMPLINGTIME_12CYCLES_5 (ADC_SMPR_SMP_1 | ADC_SMPR_SMP_0) /*…
634 #define LL_ADC_SAMPLINGTIME_39CYCLES_5 (ADC_SMPR_SMP_2 | ADC_SMPR_SMP_0) /*…
636 #define LL_ADC_SAMPLINGTIME_160CYCLES_5 (ADC_SMPR_SMP_2 | ADC_SMPR_SMP_1 | ADC_SMPR_SMP_0) /*…
/hal_stm32-2.7.6/stm32cube/stm32f0xx/soc/
Dstm32f070x6.h758 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
764 #define ADC_SMPR1_SMPR_0 (ADC_SMPR_SMP_0) /*!< bit 0 */
Dstm32f030x6.h713 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
719 #define ADC_SMPR1_SMPR_0 (ADC_SMPR_SMP_0) /*!< bit 0 */
Dstm32f030x8.h729 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
735 #define ADC_SMPR1_SMPR_0 (ADC_SMPR_SMP_0) /*!< bit 0 */
Dstm32f030xc.h745 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
751 #define ADC_SMPR1_SMPR_0 (ADC_SMPR_SMP_0) /*!< bit 0 */
Dstm32f031x6.h723 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
729 #define ADC_SMPR1_SMPR_0 (ADC_SMPR_SMP_0) /*!< bit 0 */
Dstm32f038xx.h722 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
728 #define ADC_SMPR1_SMPR_0 (ADC_SMPR_SMP_0) /*!< bit 0 */
Dstm32f070xb.h781 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
787 #define ADC_SMPR1_SMPR_0 (ADC_SMPR_SMP_0) /*!< bit 0 */
Dstm32f051x8.h829 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
835 #define ADC_SMPR1_SMPR_0 (ADC_SMPR_SMP_0) /*!< bit 0 */
Dstm32f058xx.h828 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
834 #define ADC_SMPR1_SMPR_0 (ADC_SMPR_SMP_0) /*!< bit 0 */
Dstm32f071xb.h863 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
869 #define ADC_SMPR1_SMPR_0 (ADC_SMPR_SMP_0) /*!< bit 0 */
/hal_stm32-2.7.6/stm32cube/stm32l0xx/soc/
Dstm32l010x6.h761 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
767 #define ADC_SMPR_SMPR_0 ADC_SMPR_SMP_0
Dstm32l010x8.h763 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
769 #define ADC_SMPR_SMPR_0 ADC_SMPR_SMP_0
Dstm32l031xx.h784 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
790 #define ADC_SMPR_SMPR_0 ADC_SMPR_SMP_0
Dstm32l041xx.h805 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
811 #define ADC_SMPR_SMPR_0 ADC_SMPR_SMP_0
Dstm32l051xx.h819 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
825 #define ADC_SMPR_SMPR_0 ADC_SMPR_SMP_0
Dstm32l011xx.h775 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
781 #define ADC_SMPR_SMPR_0 ADC_SMPR_SMP_0
Dstm32l010x4.h755 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
761 #define ADC_SMPR_SMPR_0 ADC_SMPR_SMP_0
Dstm32l010xb.h768 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
774 #define ADC_SMPR_SMPR_0 ADC_SMPR_SMP_0
Dstm32l021xx.h796 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
802 #define ADC_SMPR_SMPR_0 ADC_SMPR_SMP_0
Dstm32l071xx.h841 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
847 #define ADC_SMPR_SMPR_0 ADC_SMPR_SMP_0
Dstm32l081xx.h862 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
868 #define ADC_SMPR_SMPR_0 ADC_SMPR_SMP_0
Dstm32l062xx.h949 #define ADC_SMPR_SMP_0 (0x1UL << ADC_SMPR_SMP_Pos) /*!< 0x00000001 */ macro
955 #define ADC_SMPR_SMPR_0 ADC_SMPR_SMP_0

12