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Searched refs:ADC_SMPR1_SMP28_Pos (Results 1 – 12 of 12) sorted by relevance

/hal_stm32-2.7.6/stm32cube/stm32l1xx/soc/
Dstm32l162xdx.h1104 #define ADC_SMPR1_SMP28_Pos (24U) macro
1105 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1107 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1108 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1109 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l152xdx.h1081 #define ADC_SMPR1_SMP28_Pos (24U) macro
1082 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1084 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1085 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1086 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l152xe.h1081 #define ADC_SMPR1_SMP28_Pos (24U) macro
1082 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1084 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1085 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1086 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l162xe.h1104 #define ADC_SMPR1_SMP28_Pos (24U) macro
1105 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1107 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1108 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1109 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l162xca.h1087 #define ADC_SMPR1_SMP28_Pos (24U) macro
1088 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1090 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1091 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1092 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l151xca.h1047 #define ADC_SMPR1_SMP28_Pos (24U) macro
1048 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1050 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1051 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1052 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l151xe.h1064 #define ADC_SMPR1_SMP28_Pos (24U) macro
1065 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1067 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1068 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1069 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l152xca.h1064 #define ADC_SMPR1_SMP28_Pos (24U) macro
1065 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1067 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1068 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1069 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l151xdx.h1064 #define ADC_SMPR1_SMP28_Pos (24U) macro
1065 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1067 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1068 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1069 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l152xd.h1138 #define ADC_SMPR1_SMP28_Pos (24U) macro
1139 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1141 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1142 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1143 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l151xd.h1121 #define ADC_SMPR1_SMP28_Pos (24U) macro
1122 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1124 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1125 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1126 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */
Dstm32l162xd.h1161 #define ADC_SMPR1_SMP28_Pos (24U) macro
1162 #define ADC_SMPR1_SMP28_Msk (0x7UL << ADC_SMPR1_SMP28_Pos) /*!< 0x07000000 */
1164 #define ADC_SMPR1_SMP28_0 (0x1UL << ADC_SMPR1_SMP28_Pos) /*!< 0x01000000 */
1165 #define ADC_SMPR1_SMP28_1 (0x2UL << ADC_SMPR1_SMP28_Pos) /*!< 0x02000000 */
1166 #define ADC_SMPR1_SMP28_2 (0x4UL << ADC_SMPR1_SMP28_Pos) /*!< 0x04000000 */