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Searched refs:clock (Results 1 – 20 of 20) sorted by relevance

/hal_silabs-latest/gecko/emlib/src/
Dem_cmu_fpga.c111 CMU_ClkDiv_TypeDef CMU_ClockDivGet(CMU_Clock_TypeDef clock) in CMU_ClockDivGet() argument
115 switch (clock) { in CMU_ClockDivGet()
142 void CMU_ClockDivSet(CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div) in CMU_ClockDivSet() argument
144 (void) clock; in CMU_ClockDivSet()
148 void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable) in CMU_ClockEnable() argument
150 (void) clock; in CMU_ClockEnable()
154 uint32_t CMU_ClockFreqGet(CMU_Clock_TypeDef clock) in CMU_ClockFreqGet() argument
157 switch (clock) { in CMU_ClockFreqGet()
283 CMU_Select_TypeDef CMU_ClockSelectGet(CMU_Clock_TypeDef clock) in CMU_ClockSelectGet() argument
287 switch (clock) { in CMU_ClockSelectGet()
[all …]
Dem_leuart.c205 CMU_Clock_TypeDef clock; in LEUART_BaudrateGet() local
209 clock = cmuClock_LEUART0; in LEUART_BaudrateGet()
213 clock = cmuClock_LEUART1; in LEUART_BaudrateGet()
221 freq = CMU_ClockFreqGet(clock); in LEUART_BaudrateGet()
251 CMU_Clock_TypeDef clock; in LEUART_BaudrateSet() local
286 clock = cmuClock_LEUART0; in LEUART_BaudrateSet()
290 clock = cmuClock_LEUART1; in LEUART_BaudrateSet()
298 refFreq = CMU_ClockFreqGet(clock); in LEUART_BaudrateSet()
Dem_cmu.c625 CMU_ClkDiv_TypeDef CMU_ClockDivGet(CMU_Clock_TypeDef clock) in CMU_ClockDivGet() argument
629 switch (clock) { in CMU_ClockDivGet()
694 void CMU_ClockDivSet(CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div) in CMU_ClockDivSet() argument
705 switch (clock) { in CMU_ClockDivSet()
808 void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable) in CMU_ClockEnable() argument
814 if (((unsigned)clock >> CMU_EN_REG_POS) == CMU_NO_EN_REG) { in CMU_ClockEnable()
816 } else if (((unsigned)clock >> CMU_EN_REG_POS) == CMU_CLKEN0_EN_REG) { in CMU_ClockEnable()
818 } else if (((unsigned)clock >> CMU_EN_REG_POS) == CMU_CLKEN1_EN_REG) { in CMU_ClockEnable()
821 } else if (((unsigned)clock >> CMU_EN_REG_POS) == CMU_CLKEN2_EN_REG) { in CMU_ClockEnable()
834 bit = ((unsigned)clock >> CMU_EN_BIT_POS) & CMU_EN_BIT_MASK; in CMU_ClockEnable()
[all …]
Dem_eusart.c853 CMU_Clock_TypeDef clock; in EUSART_ClockGet() local
857 clock = cmuClock_EUART0; in EUSART_ClockGet()
862 clock = cmuClock_EUSART0; in EUSART_ClockGet()
867 clock = cmuClock_EUSART1; in EUSART_ClockGet()
872 clock = cmuClock_EUSART2; in EUSART_ClockGet()
877 clock = cmuClock_EUSART3; in EUSART_ClockGet()
882 clock = cmuClock_EUSART4; in EUSART_ClockGet()
889 return clock; in EUSART_ClockGet()
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_cmu_fpga.c111 CMU_ClkDiv_TypeDef CMU_ClockDivGet(CMU_Clock_TypeDef clock) in CMU_ClockDivGet() argument
115 switch (clock) { in CMU_ClockDivGet()
142 void CMU_ClockDivSet(CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div) in CMU_ClockDivSet() argument
144 (void) clock; in CMU_ClockDivSet()
148 void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable) in CMU_ClockEnable() argument
150 (void) clock; in CMU_ClockEnable()
154 uint32_t CMU_ClockFreqGet(CMU_Clock_TypeDef clock) in CMU_ClockFreqGet() argument
157 switch (clock) { in CMU_ClockFreqGet()
283 CMU_Select_TypeDef CMU_ClockSelectGet(CMU_Clock_TypeDef clock) in CMU_ClockSelectGet() argument
287 switch (clock) { in CMU_ClockSelectGet()
[all …]
Dem_cmu_fpga_npu.c111 CMU_ClkDiv_TypeDef CMU_ClockDivGet(CMU_Clock_TypeDef clock) in CMU_ClockDivGet() argument
115 switch (clock) { in CMU_ClockDivGet()
142 void CMU_ClockDivSet(CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div) in CMU_ClockDivSet() argument
144 (void) clock; in CMU_ClockDivSet()
148 void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable) in CMU_ClockEnable() argument
150 (void) clock; in CMU_ClockEnable()
154 uint32_t CMU_ClockFreqGet(CMU_Clock_TypeDef clock) in CMU_ClockFreqGet() argument
157 switch (clock) { in CMU_ClockFreqGet()
286 CMU_Select_TypeDef CMU_ClockSelectGet(CMU_Clock_TypeDef clock) in CMU_ClockSelectGet() argument
290 switch (clock) { in CMU_ClockSelectGet()
[all …]
Dem_cmu.c628 CMU_ClkDiv_TypeDef CMU_ClockDivGet(CMU_Clock_TypeDef clock) in CMU_ClockDivGet() argument
632 switch (clock) { in CMU_ClockDivGet()
697 void CMU_ClockDivSet(CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div) in CMU_ClockDivSet() argument
709 switch (clock) { in CMU_ClockDivSet()
814 SL_WEAK void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable) in CMU_ClockEnable() argument
820 if (((unsigned)clock >> CMU_EN_REG_POS) == CMU_NO_EN_REG) { in CMU_ClockEnable()
822 } else if (((unsigned)clock >> CMU_EN_REG_POS) == CMU_CLKEN0_EN_REG) { in CMU_ClockEnable()
824 } else if (((unsigned)clock >> CMU_EN_REG_POS) == CMU_CLKEN1_EN_REG) { in CMU_ClockEnable()
827 } else if (((unsigned)clock >> CMU_EN_REG_POS) == CMU_CLKEN2_EN_REG) { in CMU_ClockEnable()
840 bit = ((unsigned)clock >> CMU_EN_BIT_POS) & CMU_EN_BIT_MASK; in CMU_ClockEnable()
[all …]
Dem_eusart.c856 CMU_Clock_TypeDef clock; in EUSART_ClockGet() local
860 clock = cmuClock_EUART0; in EUSART_ClockGet()
865 clock = cmuClock_EUSART0; in EUSART_ClockGet()
870 clock = cmuClock_EUSART1; in EUSART_ClockGet()
875 clock = cmuClock_EUSART2; in EUSART_ClockGet()
880 clock = cmuClock_EUSART3; in EUSART_ClockGet()
885 clock = cmuClock_EUSART4; in EUSART_ClockGet()
892 return clock; in EUSART_ClockGet()
/hal_silabs-latest/gecko/emlib/inc/
Dem_cmu_fpga.h625 void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable);
626 CMU_ClkDiv_TypeDef CMU_ClockDivGet(CMU_Clock_TypeDef clock);
627 void CMU_ClockDivSet(CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div);
628 uint32_t CMU_ClockFreqGet(CMU_Clock_TypeDef clock);
629 void CMU_ClockSelectSet(CMU_Clock_TypeDef clock, CMU_Select_TypeDef ref);
630 CMU_Select_TypeDef CMU_ClockSelectGet(CMU_Clock_TypeDef clock);
Dem_cmu.h55 #define CMU_CLOCK_SELECT_SET(clock, sel) CMU_##clock##_SELECT_##sel argument
1356 CMU_ClkDiv_TypeDef CMU_ClockDivGet(CMU_Clock_TypeDef clock);
1357 void CMU_ClockDivSet(CMU_Clock_TypeDef clock,
1360 void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable);
1362 uint32_t CMU_ClockFreqGet(CMU_Clock_TypeDef clock);
1363 CMU_Select_TypeDef CMU_ClockSelectGet(CMU_Clock_TypeDef clock);
1364 void CMU_ClockSelectSet(CMU_Clock_TypeDef clock,
1366 uint16_t CMU_LF_ClockPrecisionGet(CMU_Clock_TypeDef clock);
1367 uint16_t CMU_HF_ClockPrecisionGet(CMU_Clock_TypeDef clock);
1430 __STATIC_INLINE void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable) in CMU_ClockEnable() argument
[all …]
/hal_silabs-latest/simplicity_sdk/platform/emlib/inc/
Dem_cmu_fpga.h625 void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable);
626 CMU_ClkDiv_TypeDef CMU_ClockDivGet(CMU_Clock_TypeDef clock);
627 void CMU_ClockDivSet(CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div);
628 uint32_t CMU_ClockFreqGet(CMU_Clock_TypeDef clock);
629 void CMU_ClockSelectSet(CMU_Clock_TypeDef clock, CMU_Select_TypeDef ref);
630 CMU_Select_TypeDef CMU_ClockSelectGet(CMU_Clock_TypeDef clock);
Dem_cmu.h55 #define CMU_CLOCK_SELECT_SET(clock, sel) CMU_##clock##_SELECT_##sel argument
1356 CMU_ClkDiv_TypeDef CMU_ClockDivGet(CMU_Clock_TypeDef clock);
1357 void CMU_ClockDivSet(CMU_Clock_TypeDef clock,
1360 void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable);
1362 uint32_t CMU_ClockFreqGet(CMU_Clock_TypeDef clock);
1363 CMU_Select_TypeDef CMU_ClockSelectGet(CMU_Clock_TypeDef clock);
1364 void CMU_ClockSelectSet(CMU_Clock_TypeDef clock,
1366 uint16_t CMU_LF_ClockPrecisionGet(CMU_Clock_TypeDef clock);
1367 uint16_t CMU_HF_ClockPrecisionGet(CMU_Clock_TypeDef clock);
1431 __STATIC_INLINE void CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable) in CMU_ClockEnable() argument
[all …]
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/cmsis_driver/
DUSART.h236 USART_PIN *clock; member
261 USART_CLOCK clock; member
DGSPI.h137 GSPI_PIN *clock; member
DSPI.h424 SPI_CLOCK clock; member
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/unified_peripheral_drivers/src/
Dsl_si91x_peripheral_gpio.c386 void sl_si91x_gpio_enable_clock(sl_si91x_gpio_select_clock_t clock) in sl_si91x_gpio_enable_clock() argument
388 SL_GPIO_ASSERT(SL_GPIO_VALIDATE_PARAMETER(clock)); in sl_si91x_gpio_enable_clock()
390 if (clock == M4CLK_GPIO) { in sl_si91x_gpio_enable_clock()
407 void sl_si91x_gpio_disable_clock(sl_si91x_gpio_select_clock_t clock) in sl_si91x_gpio_disable_clock() argument
409 SL_GPIO_ASSERT(SL_GPIO_VALIDATE_PARAMETER(clock)); in sl_si91x_gpio_disable_clock()
411 if (clock == M4CLK_GPIO) { in sl_si91x_gpio_disable_clock()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/unified_api/inc/
Dsl_si91x_driver_gpio.h542 sl_status_t sl_si91x_gpio_driver_disable_clock(sl_si91x_gpio_select_clock_t clock);
557 sl_status_t sl_si91x_gpio_driver_enable_clock(sl_si91x_gpio_select_clock_t clock);
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/unified_api/src/
Dsl_si91x_driver_gpio.c856 sl_status_t sl_si91x_gpio_driver_enable_clock(sl_si91x_gpio_select_clock_t clock) in sl_si91x_gpio_driver_enable_clock() argument
859 if (clock > GPIO_CLOCK_MAX_VAL) { in sl_si91x_gpio_driver_enable_clock()
863 sl_si91x_gpio_enable_clock(clock); in sl_si91x_gpio_driver_enable_clock()
874 sl_status_t sl_si91x_gpio_driver_disable_clock(sl_si91x_gpio_select_clock_t clock) in sl_si91x_gpio_driver_disable_clock() argument
877 if (clock > GPIO_CLOCK_MAX_VAL) { in sl_si91x_gpio_driver_disable_clock()
881 sl_si91x_gpio_disable_clock(clock); in sl_si91x_gpio_driver_disable_clock()
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/unified_peripheral_drivers/inc/
Dsl_si91x_gpio.h615 void sl_si91x_gpio_disable_clock(sl_si91x_gpio_select_clock_t clock);
625 void sl_si91x_gpio_enable_clock(sl_si91x_gpio_select_clock_t clock);
/hal_silabs-latest/wiseconnect/components/device/silabs/si91x/mcu/drivers/rom_driver/inc/
Drsi_rom_table_si91x.h601 int32_t (*I2Cx_Control)(uint32_t control, uint32_t arg, I2C_RESOURCES *i2c, uint32_t clock);