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Searched refs:_USART_TIMING_CSHOLD_ZERO (Results 1 – 17 of 17) sorted by relevance

/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32FG23/Include/
Defr32fg23_usart.h1230 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode Z… macro
1239 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifte…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG29/Include/
Defr32bg29_usart.h1230 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode Z… macro
1239 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifte…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32ZG23/Include/
Defr32zg23_usart.h1230 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode Z… macro
1239 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifte…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_usart.h1230 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode Z… macro
1239 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifte…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG29/Include/
Defr32mg29_usart.h1230 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode Z… macro
1239 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifte…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_usart.h1230 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode Z… macro
1239 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifte…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_usart.h1230 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode Z… macro
1239 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifte…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_usart.h1230 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode Z… macro
1239 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifte…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_usart.h1400 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode ZER… macro
1409 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifted …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_usart.h1464 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode ZER… macro
1473 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifted …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_usart.h1368 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode ZER… macro
1377 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifted …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_usart.h1368 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode ZER… macro
1377 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifted …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_usart.h1368 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode ZER… macro
1377 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifted …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_usart.h1368 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode ZER… macro
1377 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifted …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_usart.h1368 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode ZER… macro
1377 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifted …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_usart.h1368 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode ZER… macro
1377 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifted …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_usart.h1368 #define _USART_TIMING_CSHOLD_ZERO 0x00000000UL /**< Mode ZER… macro
1377 #define USART_TIMING_CSHOLD_ZERO (_USART_TIMING_CSHOLD_ZERO << 28) /**< Shifted …