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Searched refs:_SMU_PPUPATD1_WDOG1_MASK (Results 1 – 25 of 73) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_smu.h295 #define _SMU_PPUPATD1_WDOG1_MASK 0x800UL /**< Bit mask for … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_smu.h295 #define _SMU_PPUPATD1_WDOG1_MASK 0x800UL /**< Bit mask for … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_smu.h305 #define _SMU_PPUPATD1_WDOG1_MASK 0x2000UL /**< Bit mask for … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_smu.h305 #define _SMU_PPUPATD1_WDOG1_MASK 0x2000UL /**< Bit mask for … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_smu.h305 #define _SMU_PPUPATD1_WDOG1_MASK 0x2000UL /**< Bit mask for … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_smu.h391 #define _SMU_PPUPATD1_WDOG1_MASK 0x1000000UL /**< Bit mask for … macro
Defm32gg12b390f1024gl112.h7826 #define _SMU_PPUPATD1_WDOG1_MASK 0x1000000UL /**< Bit mask for … macro
Defm32gg12b390f512gl112.h7826 #define _SMU_PPUPATD1_WDOG1_MASK 0x1000000UL /**< Bit mask for … macro
Defm32gg12b530f512il120.h8629 #define _SMU_PPUPATD1_WDOG1_MASK 0x1000000UL /**< Bit mask for … macro
Defm32gg12b530f512im64.h8629 #define _SMU_PPUPATD1_WDOG1_MASK 0x1000000UL /**< Bit mask for … macro
Defm32gg12b530f512iq100.h8629 #define _SMU_PPUPATD1_WDOG1_MASK 0x1000000UL /**< Bit mask for … macro
Defm32gg12b530f512iq64.h8629 #define _SMU_PPUPATD1_WDOG1_MASK 0x1000000UL /**< Bit mask for … macro
Defm32gg12b530f512gq100.h8629 #define _SMU_PPUPATD1_WDOG1_MASK 0x1000000UL /**< Bit mask for … macro
Defm32gg12b530f512gq64.h8629 #define _SMU_PPUPATD1_WDOG1_MASK 0x1000000UL /**< Bit mask for … macro
Defm32gg12b530f512il112.h8629 #define _SMU_PPUPATD1_WDOG1_MASK 0x1000000UL /**< Bit mask for … macro
Defm32gg12b110f1024gm64.h8593 #define _SMU_PPUPATD1_WDOG1_MASK 0x1000000UL /**< Bit mask for … macro
Defm32gg12b110f1024gq64.h8593 #define _SMU_PPUPATD1_WDOG1_MASK 0x1000000UL /**< Bit mask for … macro
Defm32gg12b530f512gl112.h8629 #define _SMU_PPUPATD1_WDOG1_MASK 0x1000000UL /**< Bit mask for … macro
Defm32gg12b530f512gl120.h8629 #define _SMU_PPUPATD1_WDOG1_MASK 0x1000000UL /**< Bit mask for … macro
Defm32gg12b530f512gm64.h8629 #define _SMU_PPUPATD1_WDOG1_MASK 0x1000000UL /**< Bit mask for … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_smu.h421 #define _SMU_PPUPATD1_WDOG1_MASK 0x8000000UL /**< Bit mask for … macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_smu.h495 #define _SMU_PPUPATD1_WDOG1_MASK 0x80UL /**< Bit … macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32FG23/Include/
Defr32fg23_smu.h565 #define _SMU_PPUPATD1_WDOG1_MASK 0x200000UL /**< Bit m… macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32ZG23/Include/
Defr32zg23_smu.h565 #define _SMU_PPUPATD1_WDOG1_MASK 0x200000UL /**< Bit m… macro
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_smu.h545 #define _SMU_PPUPATD1_WDOG1_MASK 0x20000UL /**< Bit m… macro

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