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Searched refs:_SMU_PPUPATD1_IADC0_DEFAULT (Results 1 – 8 of 8) sorted by relevance

/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG21/Include/
Defr32mg21_smu.h466 #define _SMU_PPUPATD1_IADC0_DEFAULT 0x00000000UL /**< Mode… macro
467 #define SMU_PPUPATD1_IADC0_DEFAULT (_SMU_PPUPATD1_IADC0_DEFAULT << 1) /**< Shif…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG22/Include/
Defr32bg22_smu.h501 #define _SMU_PPUPATD1_IADC0_DEFAULT 0x00000001UL /**< Mode… macro
502 #define SMU_PPUPATD1_IADC0_DEFAULT (_SMU_PPUPATD1_IADC0_DEFAULT << 9) /**< Shif…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG29/Include/
Defr32mg29_smu.h516 #define _SMU_PPUPATD1_IADC0_DEFAULT 0x00000001UL /**< Mode… macro
517 #define SMU_PPUPATD1_IADC0_DEFAULT (_SMU_PPUPATD1_IADC0_DEFAULT << 11) /**< Shif…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG29/Include/
Defr32bg29_smu.h516 #define _SMU_PPUPATD1_IADC0_DEFAULT 0x00000001UL /**< Mode… macro
517 #define SMU_PPUPATD1_IADC0_DEFAULT (_SMU_PPUPATD1_IADC0_DEFAULT << 11) /**< Shif…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32BG27/Include/
Defr32bg27_smu.h511 #define _SMU_PPUPATD1_IADC0_DEFAULT 0x00000001UL /**< Mode… macro
512 #define SMU_PPUPATD1_IADC0_DEFAULT (_SMU_PPUPATD1_IADC0_DEFAULT << 11) /**< Shif…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32FG23/Include/
Defr32fg23_smu.h511 #define _SMU_PPUPATD1_IADC0_DEFAULT 0x00000001UL /**< Mode … macro
512 #define SMU_PPUPATD1_IADC0_DEFAULT (_SMU_PPUPATD1_IADC0_DEFAULT << 10) /**< Shift…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32ZG23/Include/
Defr32zg23_smu.h511 #define _SMU_PPUPATD1_IADC0_DEFAULT 0x00000001UL /**< Mode … macro
512 #define SMU_PPUPATD1_IADC0_DEFAULT (_SMU_PPUPATD1_IADC0_DEFAULT << 10) /**< Shift…
/hal_silabs-latest/simplicity_sdk/platform/Device/SiliconLabs/EFR32MG24/Include/
Defr32mg24_smu.h491 #define _SMU_PPUPATD1_IADC0_DEFAULT 0x00000001UL /**< Mode … macro
492 #define SMU_PPUPATD1_IADC0_DEFAULT (_SMU_PPUPATD1_IADC0_DEFAULT << 6) /**< Shift…