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Searched refs:_SMU_PPUPATD0_ADC0_SHIFT (Results 1 – 25 of 71) sorted by relevance

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/hal_silabs-latest/gecko/emlib/inc/
Dem_smu.h76 …smuPeripheralADC0 = _SMU_PPUPATD0_ADC0_SHIFT, /**< SMU peripheral identifier for AD…
117 …smuPeripheralADC0 = _SMU_PPUPATD0_ADC0_SHIFT, /**< SMU peripheral identifier for AD…
164 #if defined(_SMU_PPUPATD0_ADC0_SHIFT)
165 …smuPeripheralADC0 = _SMU_PPUPATD0_ADC0_SHIFT, /**< SMU peripheral identifier for AD…
209 …smuPeripheralADC0 = _SMU_PPUPATD0_ADC0_SHIFT, /**< SMU peripheral identifier for AD…
284 …smuPeripheralADC0 = _SMU_PPUPATD0_ADC0_SHIFT, /**< SMU peripheral identifier for AD…
351 …smuPeripheralADC0 = _SMU_PPUPATD0_ADC0_SHIFT, /**< SMU peripheral identifier for AD…
/hal_silabs-latest/simplicity_sdk/platform/emlib/inc/
Dem_smu.h76 …smuPeripheralADC0 = _SMU_PPUPATD0_ADC0_SHIFT, /**< SMU peripheral identifier for AD…
117 …smuPeripheralADC0 = _SMU_PPUPATD0_ADC0_SHIFT, /**< SMU peripheral identifier for AD…
164 #if defined(_SMU_PPUPATD0_ADC0_SHIFT)
165 …smuPeripheralADC0 = _SMU_PPUPATD0_ADC0_SHIFT, /**< SMU peripheral identifier for AD…
209 …smuPeripheralADC0 = _SMU_PPUPATD0_ADC0_SHIFT, /**< SMU peripheral identifier for AD…
284 …smuPeripheralADC0 = _SMU_PPUPATD0_ADC0_SHIFT, /**< SMU peripheral identifier for AD…
351 …smuPeripheralADC0 = _SMU_PPUPATD0_ADC0_SHIFT, /**< SMU peripheral identifier for AD…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_smu.h130 #define _SMU_PPUPATD0_ADC0_SHIFT 2 /**< Shift value … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_smu.h130 #define _SMU_PPUPATD0_ADC0_SHIFT 2 /**< Shift value … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_smu.h130 #define _SMU_PPUPATD0_ADC0_SHIFT 2 /**< Shift value … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_smu.h130 #define _SMU_PPUPATD0_ADC0_SHIFT 2 /**< Shift value … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_smu.h130 #define _SMU_PPUPATD0_ADC0_SHIFT 2 /**< Shift value … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_smu.h136 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b390f1024gl112.h7581 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b390f512gl112.h7581 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b530f512il120.h8389 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b530f512im64.h8389 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b530f512iq100.h8389 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b530f512iq64.h8389 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b530f512gq100.h8389 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b530f512gq64.h8389 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b530f512il112.h8389 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b110f1024gm64.h8358 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b110f1024gq64.h8358 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b530f512gl112.h8389 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b530f512gl120.h8389 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b530f512gm64.h8389 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b510f1024gq100.h8389 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
Defm32gg12b510f1024gq64.h8389 #define _SMU_PPUPATD0_ADC0_SHIFT 3 /**< Shift value … macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_smu.h141 #define _SMU_PPUPATD0_ADC0_SHIFT 4 /**< Shift value … macro

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