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Searched refs:_CMU_HFRCOSS_SSINV_MASK (Results 1 – 25 of 80) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_cmu.h2033 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_cmu.h2033 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_cmu.h2033 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_cmu.h2087 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_cmu.h2087 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defr32bg13p732f512gm32.h4237 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defr32bg13p732f512gm48.h4237 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defr32bg13p733f512gm48.h4237 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defr32bg13p532f512gm48.h4237 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defr32bg13p632f512gm32.h4237 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defr32bg13p632f512gm48.h4237 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defr32bg13p632f512im32.h4237 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defr32bg13p632f512im48.h4237 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defr32bg13p532f512gm32.h4237 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_cmu.h2598 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defm32gg12b390f1024gl112.h6393 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defm32gg12b390f512gl112.h6393 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defm32gg12b530f512il120.h7201 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defm32gg12b530f512im64.h7201 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defm32gg12b530f512iq100.h7201 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defm32gg12b530f512iq64.h7201 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
Defm32gg12b530f512gq100.h7201 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_cmu.h2644 #define _CMU_HFRCOSS_SSINV_MASK 0x1F00UL /**< Bi… macro
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_cmu.c10273 EFM_ASSERT(init->ssInterval <= (_CMU_HFRCOSS_SSINV_MASK in CMU_DPLLLock()
/hal_silabs-latest/gecko/emlib/src/
Dem_cmu.c10220 EFM_ASSERT(init->ssInterval <= (_CMU_HFRCOSS_SSINV_MASK in CMU_DPLLLock()

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