Searched refs:SI32_PBCFG_A_CONTROL1_MATMD_MASK (Results 1 – 6 of 6) sorted by relevance
528 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK; in _SI32_PBCFG_A_select_port_match_mode_pin_match()543 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK; in _SI32_PBCFG_A_select_port_match_mode_capsense_tx()558 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK; in _SI32_PBCFG_A_select_port_match_mode_capsense_rx()
624 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK;\640 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK;\656 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK;\
447 #define SI32_PBCFG_A_CONTROL1_MATMD_MASK 0x00030000 macro
622 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK;\638 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK;\654 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK;\