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Searched refs:SI32_PBCFG_A_CONTROL1_MATMD_MASK (Results 1 – 6 of 6) sorted by relevance

/hal_silabs-latest/si32/si32Hal/sim3c1xx/
DSI32_PBCFG_A_Type.c528 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK; in _SI32_PBCFG_A_select_port_match_mode_pin_match()
543 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK; in _SI32_PBCFG_A_select_port_match_mode_capsense_tx()
558 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK; in _SI32_PBCFG_A_select_port_match_mode_capsense_rx()
DSI32_PBCFG_A_Type.h624 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK;\
640 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK;\
656 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK;\
DSI32_SIM3C1XX_PBCFG_A_Registers.h447 #define SI32_PBCFG_A_CONTROL1_MATMD_MASK 0x00030000 macro
/hal_silabs-latest/si32/si32Hal/sim3u1xx/
DSI32_PBCFG_A_Type.c528 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK; in _SI32_PBCFG_A_select_port_match_mode_pin_match()
543 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK; in _SI32_PBCFG_A_select_port_match_mode_capsense_tx()
558 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK; in _SI32_PBCFG_A_select_port_match_mode_capsense_rx()
DSI32_PBCFG_A_Type.h622 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK;\
638 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK;\
654 basePointer->CONTROL1_CLR = SI32_PBCFG_A_CONTROL1_MATMD_MASK;\
DSI32_SIM3U1XX_PBCFG_A_Registers.h447 #define SI32_PBCFG_A_CONTROL1_MATMD_MASK 0x00030000 macro