Searched refs:SI32_ENCDEC_A_CONTROL_OORDER_MASK (Results 1 – 3 of 3) sorted by relevance
372 basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_OORDER_MASK; in _SI32_ENCDEC_A_select_output_order_no_change()385 basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_OORDER_MASK; in _SI32_ENCDEC_A_select_output_order_flip_half_word()399 basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_OORDER_MASK; in _SI32_ENCDEC_A_select_output_order_flip_word()413 basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_OORDER_MASK; in _SI32_ENCDEC_A_select_output_order_flip_lower_three_bytes()
397 (basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_OORDER_MASK)410 basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_OORDER_MASK;\425 basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_OORDER_MASK;\440 basePointer->CONTROL_CLR = SI32_ENCDEC_A_CONTROL_OORDER_MASK;\
182 #define SI32_ENCDEC_A_CONTROL_OORDER_MASK 0x00003000 macro
